The XC9500 series parts require a special interpretation of some SVF
commands. A command may fail and be retried with increasing delay (to poll
for completion of a slow operation). Xilinx has an app note and example
code for this. As far as I know, UrJTAG does not provide the special
exception-handling behavior that Xilinx specifies. As it is, programming an
XC9500-series CPLD with UrJTAG will always fail because an erase or
programming command will not finish as quickly as the file expects.
See this, starting at the bottom of page 4:
http://www.xilinx.com/support/documentation/application_notes/xapp067.pdf
The in-system programming example code goes with App Note 058, which covers
the XSVF format:
http://www.xilinx.com/support/documentation/application_notes/xapp058.zip
I have been using other tools to program these chips. It would be nice to
add this to UrJTAG, but then we must decide how to handle the unusual SVF
behavior. Is it acceptable to do this for all SVF files? Should this be a
flag for the svf command? Are there vendors other than Xilinx which have
similar requirements?
One option is to leave SVF support alone, and add XSVF support with the
Xilinx-specific behavior. Then it would be required to use an XSVF file to
program these CPLDs (but I think all other Xilinx parts could use SVF).
I have written my own XSVF interpreter (incomplete, but good enough for the
XC9500's) which might be rearranged and merged into UrJTAG if this is
desired and there is some licensing concern with Xilinx's code.
On Thu, May 5, 2011 at 2:07 PM, Thomas Heller <[email protected]> wrote:
> I have a board that contains a small ARM (iMX25) module running linux.
> The cpu on this module communicates with its peripherals
> via an XC9572XL CPLD.
>
> Of course, the CPLD must be programmed once - currently this
> is done via a xilinx USB platform cable USB, in a separate step
> from a host PC.
>
> It would of course be much nicer to let the ARM CPU do the programming;
> this would also allow for firmware field-upgrades.
>
> Is it possible to use urjtag for this task? I have some free GPIO pins
> on the cpu that I would like to 'emulate' a jtag master interface.
>
> Thanks for any ideas,
> Thomas
>
>
> ------------------------------------------------------------------------------
> WhatsUp Gold - Download Free Network Management Software
> The most intuitive, comprehensive, and cost-effective network
> management toolset available today. Delivers lowest initial
> acquisition cost and overall TCO of any competing solution.
> http://p.sf.net/sfu/whatsupgold-sd
> _______________________________________________
> UrJTAG-development mailing list
> [email protected]
> https://lists.sourceforge.net/lists/listinfo/urjtag-development
>
------------------------------------------------------------------------------
WhatsUp Gold - Download Free Network Management Software
The most intuitive, comprehensive, and cost-effective network
management toolset available today. Delivers lowest initial
acquisition cost and overall TCO of any competing solution.
http://p.sf.net/sfu/whatsupgold-sd
_______________________________________________
UrJTAG-development mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/urjtag-development
