> On Jun 22, 2018, at 2:14 PM, Brice Goglin <brice.gog...@inria.fr> wrote:
> 
> If psr is the processor where the task is actually running, I guess we'd need 
> your lstopo output to find out where those processors are in the machine.
> 

Excellent, that’s exactly the sort of thing I was hoping someone on the list 
would know how to determine.  Looks like (see lstopo output at the end)  0,16 
is one real core, 1,17 another, etc.  That’s sort of what I expected.  Looks 
like my original message truncated the list, and of course now that process 
isn’t running.  Here’s a current list, with PSR as the second column
 5173   2 ?        00:10:35 vasp.para.intel
 5182   5 ?        00:10:35 vasp.para.intel
 5184   9 ?        00:10:36 vasp.para.intel
 5177  16 ?        00:10:35 vasp.para.intel
 5169  17 ?        00:10:35 vasp.para.intel
 5187  19 ?        00:10:35 vasp.para.intel
 5175  20 ?        00:10:36 vasp.para.intel
 5179  22 ?        00:10:35 vasp.para.intel
 5171  23 ?        00:10:35 vasp.para.intel
 5178  24 ?        00:10:36 vasp.para.intel
 5170  26 ?        00:10:36 vasp.para.intel
 5181  27 ?        00:10:36 vasp.para.intel
 5174  28 ?        00:10:36 vasp.para.intel
 5172  29 ?        00:10:36 vasp.para.intel
 5176  30 ?        00:10:36 vasp.para.intel
 5189  31 ?        00:10:36 vasp.para.intel

That corresponds to physical core numbers
        2,5,9,0,1,3,4,6,7,8,10,11,12,13,14,15
So I guess it really is associating each process with a single unique core.  I 
guess that’s good for openmpi, although it does undercut my core binding 
hypothesis. 

                                                                                
thanks,
                                                                                
Noam


compute-7-53 1001 : lstopo
Machine (64GB)
  NUMANode L#0 (P#0 32GB)
    Socket L#0 + L3 L#0 (20MB)
      L2 L#0 (256KB) + L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0
        PU L#0 (P#0)
        PU L#1 (P#16)
      L2 L#1 (256KB) + L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1
        PU L#2 (P#1)
        PU L#3 (P#17)
      L2 L#2 (256KB) + L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2
        PU L#4 (P#2)
        PU L#5 (P#18)
      L2 L#3 (256KB) + L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3
        PU L#6 (P#3)
        PU L#7 (P#19)
      L2 L#4 (256KB) + L1d L#4 (32KB) + L1i L#4 (32KB) + Core L#4
        PU L#8 (P#4)
        PU L#9 (P#20)
      L2 L#5 (256KB) + L1d L#5 (32KB) + L1i L#5 (32KB) + Core L#5
        PU L#10 (P#5)
        PU L#11 (P#21)
      L2 L#6 (256KB) + L1d L#6 (32KB) + L1i L#6 (32KB) + Core L#6
        PU L#12 (P#6)
        PU L#13 (P#22)
      L2 L#7 (256KB) + L1d L#7 (32KB) + L1i L#7 (32KB) + Core L#7
        PU L#14 (P#7)
        PU L#15 (P#23)
    HostBridge L#0
      PCIBridge
        PCI 8086:1521
          Net L#0 "eth0"
        PCI 8086:1521
          Net L#1 "eth1"
      PCIBridge
        PCI 15b3:1003
          Net L#2 "ib0"
          OpenFabrics L#3 "mlx4_0"
      PCI 8086:8d62
      PCIBridge
        PCIBridge
          PCI 1a03:2000
      PCI 8086:8d02
        Block L#4 "sda"
  NUMANode L#1 (P#1 32GB) + Socket L#1 + L3 L#1 (20MB)
    L2 L#8 (256KB) + L1d L#8 (32KB) + L1i L#8 (32KB) + Core L#8
      PU L#16 (P#8)
      PU L#17 (P#24)
    L2 L#9 (256KB) + L1d L#9 (32KB) + L1i L#9 (32KB) + Core L#9
      PU L#18 (P#9)
      PU L#19 (P#25)
    L2 L#10 (256KB) + L1d L#10 (32KB) + L1i L#10 (32KB) + Core L#10
      PU L#20 (P#10)
      PU L#21 (P#26)
    L2 L#11 (256KB) + L1d L#11 (32KB) + L1i L#11 (32KB) + Core L#11
      PU L#22 (P#11)
      PU L#23 (P#27)
    L2 L#12 (256KB) + L1d L#12 (32KB) + L1i L#12 (32KB) + Core L#12
      PU L#24 (P#12)
      PU L#25 (P#28)
    L2 L#13 (256KB) + L1d L#13 (32KB) + L1i L#13 (32KB) + Core L#13
      PU L#26 (P#13)
      PU L#27 (P#29)
    L2 L#14 (256KB) + L1d L#14 (32KB) + L1i L#14 (32KB) + Core L#14
      PU L#28 (P#14)
      PU L#29 (P#30)
    L2 L#15 (256KB) + L1d L#15 (32KB) + L1i L#15 (32KB) + Core L#15
      PU L#30 (P#15)
      PU L#31 (P#31)

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