This is, in fact, the recommended solution. Our error message needs some
improvement. AFAIK, the images from master branch should be working with
this procedure.

-- M

On 01/19/2018 09:27 AM, Ryan Marlow via USRP-users wrote:
> Alternatively, upgrade your FPGA image to use the latest DDC code.
> Run uhd_image_downloader to get the latest image or build your own from
> the uhd fpga repo.
> Best,
> Ryan Marlow
> 
> 
>     Date: Fri, 19 Jan 2018 16:13:47 +0000
>     From: Disco Daniele <[email protected]
>     <mailto:[email protected]>>
>     To: "[email protected] <mailto:[email protected]>"
>     <[email protected] <mailto:[email protected]>>
>     Subject: [USRP-users] x310 ddc error
>     Message-ID: <[email protected]
>     <mailto:[email protected]>>
>     Content-Type: text/plain; charset="iso-8859-1"
> 
>     HI!
> 
>     Today I installed in a new pc the UHD software.
> 
> 
>     Connecting the X310 to the pc via Ethernet, the output of
>     uhd_usrp_probe is:
> 
> 
> 
> 
>     [INFO] [UHDlinux; GNU C++ version 5.4.0 20160609; Boost_105800;
>     UHD_3.11.0.git-0-unknown]
>     [INFO] [X300] X300 initialization sequence...
>     [INFO] [X300] Determining maximum frame size...
>     [INFO] [X300] Maximum frame size: 1472 bytes.
>     [INFO] [X300] Setup basic communication...
>     [INFO] [X300] Loading values from EEPROM...
>     [INFO] [X300] Setup RF frontend clocking...
>     [INFO] [X300] Radio 1x clock:200
>     [INFO] [RFNOC DMA FIFO] Running BIST for FIFO 0...
>     [INFO] [RFNOC DMA FIFO] BIST passed (Throughput: 0 MB/s)
>     [INFO] [RFNOC DMA FIFO] Running BIST for FIFO 1...
>     [INFO] [RFNOC DMA FIFO] BIST passed (Throughput: 0 MB/s)
>     [INFO] [RFNOC RADIO] Register loopback test passed
>     [INFO] [RFNOC RADIO] Register loopback test passed
>     [INFO] [RFNOC RADIO] Register loopback test passed
>     [INFO] [RFNOC RADIO] Register loopback test passed
>     Error: RuntimeError: DDC software is too new for this hardware.
>     Please downgrade to a driver that supports hardware revision 0.
> 
> 
>     The question is: if I upgrade the sw of the FPGA I will solve the
>     issue or I have to install a version older of the UHD?
> 
> 
>     If the problem is related to the UHD sw, wich version I have to use?
> 
>     Thank you for the support
> 
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