On 06/23/2018 09:06 AM, Chintan Patel wrote:
Hi Marcus,
Thanks for the response. I came to a similar conclusion reading the
Ettus app note on MIMO synchronization.
Do you know if the DPLL code (or any other way) can be modified to
achieve phase coherence across multiple B205 minis.
My understanding is that it is likely a very challenging exercise with
the existing hardware, otherwise, it would already be in place.
But the code, like all the other Ettus FPGA and host-side UHD code is
freely available.
Thanks
Chintan
On Sat, Jun 23, 2018 at 1:07 AM, Marcus D. Leech via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
On 06/23/2018 12:25 AM, Chintan Patel via USRP-users wrote:
Hello,
I am an Ettus newbie. We have an application that requires us
to synchronize multiple B205 mini radios (RX side) using the
PPS in signal. In the FPGA, the pps_in is reclocked into the
radio clock domain. What we notice is that when we monitor
this PPS signal (reclocked in radio clock domain) from two
different radios on a scope, there is a time variation between
the alignment of these two PPS signals across different
trials. In other words, after each reset the time skew between
the two signals varies. Since the PPS_in for both radios is
the same, I think this variation across different reboot
iterations means that the radio clock is not guaranteed to be
phase aligned/locked to the PPS for the B205 radio.
Curiously, when we repeat the same experiment using the B210,
we do not see this time alignment variation across reboots.
Which only makes sense if somehow for the B210 the radio clock
is phase locked to the PPS in.
Any thoughts from folks who might have tried similar
applications and/or who understand the B205 mini/B210 radios.
Thanks
Chintan
The 1PPS/10MHz DPLL on the B205mini series is not designed to
provide close phase coherence across multiple devices. It is
designed to
synchronize the clock on the board to an external reference.
The DPLL servo code in the B205mini drives the control voltage on
the VCTCXO that provides all clocking signals on the board.
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