Hi Marcus, >Everything at that level is determined entirely by the AD9361 RFFE chip--although >there may be some settings that make things better.
It seems to make a difference if set_tx_bandwidth is called before or after get_tx_stream. In the example programs, they all seem to do it before, however, it appears to work better afterwards. Please see the attached two programmes, which are basically just your tx_samples_c program, except I've added in calls to set_tx_bandwidth and set samples to 0. I run with the args: -f 868300000 -g 89 -r 6000000 For lo_leakage_pre.c where bandwidth is set before get_tx_stream, carrier is at -1dBm. For lo_leakage_post.c, where bandwidth is set to 56M before get_tx_stream, then 6M afterwards, carrier is at -30dBm. >Does the LO leakage have a strong frequency-dependent component? It doesn't appear to vary with frequency. >I'd suggest getting yourself a copy of the full doc set for the AD9361 >-- ADI will provide them (not just the datasheet by other stuff) if > you "register" as a dev. I'm reading this now, but I don't really know enough about UHD / FPGA internals at the moment to know the order in which the various calibrations are performed. I'd guess from the above, that the bandwidth may need to be at a particular value for one of the calibration steps. Thanks, Jon _______________________________________________ USRP-users mailing list [email protected] http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
