System: CentOS 8 using Anaconda3 with the conda-forge GNURadio 3.8.2 and
UHD 3.15.0 loaded.
USRP: USRP1 with a DBSRX. Behavior is replicated with the EPEL8 UHD
3.15 packages, run as root.
Question: what version of UHD do I need to downgrade to in order for 'ye
olde DBSRX' daughterboard to be recognized and used? I am not
interested in upgrading the USRP at this time (unless someone knows of a
newer unit that can be donated to our 501(c)(3) nonprofit; we'll take a
donation of equipment, for sure!) since we have three USRP1's loaded
with DBSRX daughterboards already that have worked in the past and are
already characterized for our application. Yes, I know the USRP1 is
old, and the DBSRX is old, but they still work, they cost quite a bit of
money under a federal grant (NSF), and they're characterized for our
application here. Plus, in this application I actually need the extra
100MHz from 2.3GHz to 2.4GHz that the original DBSRX can tune. The
USRPs have been stored for a few years; they were used for a couple of
years about ten years ago and then shelved, but we want to start using
them again (long story). (It should go without saying that I'm not
interested in running a ten year old OS or really old GNUradio; there
are newer modules that I need to be able to use; just looking for last
version of UHD that actually supported DBSRX). Or if there is a
workaround for UHD 3.15 to get a DBSRX to work.
Here's the output of uhd_usrp_probe:
(base) [pari-sdr@dhcp-pool167 ~]$ uhd_usrp_probe --args="type=usrp1"
[INFO] [UHD] linux; GNU C++ version 7.5.0; Boost_107400;
UHD_3.15.0.HEAD-release
[INFO] [FX2] Loading firmware image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fw.ihx...
[INFO] [FX2] Firmware loaded
[INFO] [USRP1] Opening a USRP1 device...
[INFO] [FX2] Loading FPGA image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fpga.rbf...
[INFO] [FX2] FPGA image loaded
[INFO] [USRP1] Using FPGA clock rate of 64.000000MHz...
[ERROR] [DBMGR] The daughterboard manager encountered a recoverable
error in init.
Loading the "unknown" daughterboard implementations to continue.
The daughterboard cannot operate until this error is resolved.
AssertionError: m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6
in double dbsrx::set_lo_freq(double)
at
/home/conda/feedstock_root/build_artifacts/uhd_1602712704625/work/host/lib/usrp/dboard/db_dbsrx.cpp:306
_____________________________________________________
/
| Device: USRP1 Device
| _____________________________________________________
| /
| | Mboard: USRP1
| | serial: 4460cd30
| |
| | Time sources: none
| | Clock sources: internal
| | Sensors:
| | _____________________________________________________
| | /
| | | RX DSP: 0
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX DSP: 1
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX Dboard: A
| | | ID: DBSRX (0x0002)
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | RX Dboard: B
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | TX DSP: 0
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX DSP: 1
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX Dboard: A
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
| | _____________________________________________________
| | /
| | | TX Dboard: B
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
(base) [pari-sdr@dhcp-pool167 ~]$
Thanks in advance!
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