Hi, i am trying to debug my block and to do so i ran GUI=1 make n310_rfnoc_image_core
this brings up vivado and allows me to synthesize the design and setup ILA. when i try fitting and generating bitstream i get the following error: [DRC PDRC-29] MMCM_adv_ClkFrequency_clkin1: The calculated frequency value, 0.000 MHz, of the CLKIN1_PERIOD attribute on the MMCME2_ADV site MMCME2_ADV_X0Y0 (cell n3xx_clocking_i/misc_clock_gen_i/inst/mmcm_adv_inst) is outside the allowed range (10.000 - 933.000 MHz). Please change the CLKIN1_PERIOD attribute value in order to be within the allowed range for this device. [DRC PDRC-29] MMCM_adv_ClkFrequency_clkin1: The calculated frequency value, 0.000 MHz, of the CLKIN1_PERIOD attribute on the MMCME2_ADV site MMCME2_ADV_X1Y5 (cell u_ddr3_32bit/u_ddr3_32bit_mig/u_ddr3_infrastructure/gen_mmcm.mmcm_i) is outside the allowed range (10.000 - 933.000 MHz). Please change the CLKIN1_PERIOD attribute value in order to be within the allowed range for this device. [DRC PDRC-38] PLL_adv_ClkFrequency_clkin1: The calculated frequency value, 0.000 MHz, of the CLKIN1_PERIOD attribute on the PLLE2_ADV site PLLE2_ADV_X1Y5 (cell u_ddr3_32bit/u_ddr3_32bit_mig/u_ddr3_infrastructure/plle2_i) is outside the allowed range (19.000 - 933.000 MHz). Please change the CLKIN1_PERIOD attribute value in order to be within the allowed range for this device. strange enough i don't get these when running from console. any suggestions? Dario Pennisi
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