I'm curious if it works if you change the memory size to 1024 instead of
1025 like you have now, or if you use increasing addresses instead of
decreasing. A 1025-word memory with a reversed range is unusual. But
regardless, this warning comes from Vivado, not UHD/RFNoC, so you should
probably post your question on the Vivado forum.
Wade
On Sat, Oct 15, 2022 at 10:03 AM sp <stackprogra...@gmail.com> wrote:
> Yes, it is. I attached some example file. I changed name of them in code
> but I am faced with a warning.........
> WARNING: [Synth 8-2898] ignoring malformed $readmem task: invalid memory
> name [file.sv:50]
> WARNING: [Synth 8-2898] ignoring malformed $readmem task: invalid memory
> name [file.sv:51]
> In simulation it works but i synthesis I am faced with top
> warning..........
> why in RFNOC block I faced with this error for mem files.........can any
> one guide me?
>
> On Fri, Oct 14, 2022 at 7:36 PM Wade Fife <wade.f...@ettus.com> wrote:
>
>> Does the file you're reading from have enough data in it?
>>
>> Wade
>>
>>
>> On Thu, Oct 13, 2022, 7:39 AM sp <stackprogra...@gmail.com> wrote:
>>
>>> Why initialize large array in Verilog is not successfully. When size of
>>> array is 255 it work like charm but for other number more than 255 like
>>> 1024 and ....
>>> we observe all array is filled with zero? why large array in FPGA can
>>> not initailize correctly????
>>>
>>>
>>> Code:
>>> reg signed [15:0] data_i_pattern_buffer [1024:0];
>>> reg signed [15:0] data_q_pattern_buffer [1024:0];
>>> $readmemh("out_i.txt",data_i_pattern_buffer,0,1024);
>>> $readmemh("out_q.txt",data_q_pattern_buffer,0,1024);
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>>
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