That would be the radio reporting the overflow then. So, it sounds like your gate causes data to back up into the radio where it eventually ran out of room. Increasing the PYLD_FIFO_SIZE makes more space for data to buffer up, increasing the time before an overflow would occur
Wade On Fri, Aug 18, 2023 at 8:41 AM <jmalo...@umass.edu> wrote: > I was reading the metadata to check for a overflow (similar to the > examples). Is there a way to check specifically what block is giving an > overflow? I only know how to check if there is an overflow. > > > I was able to increase the overall data rate without overflow by > increasing PYLD_FIFO_SIZE of the axis_data_to_chdr module in the custom > block that is linked between the radio block and the rx_streamer. > _______________________________________________ > USRP-users mailing list -- usrp-users@lists.ettus.com > To unsubscribe send an email to usrp-users-le...@lists.ettus.com >
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