Hi again,
unfortunately the formatting of the code listings got lost. Here I am trying
again:
* your RFNoC block .yml file (e.g. my_gpio_block.yml) needs to have an IO port
of type “gpio”:
```
parameters:
GPIO_WIDTH: ${ config.device.parameters['FP_GPIO_BANK_WIDTH'] }
(…)
io_ports:
gpio:
type: gpio
drive: master
parameters:
width: "${parameters['GPIO_WIDTH']}"
```
* Your RFNoC block implementation in Verilog (e.g. rfnoc_block_my_gpio_block.v)
needs these additional signals: “my_gpio_block0”) to the fp_gpio port of the
device:
```
noc_blocks:
(…)
my_gpio_block0:
block_desc: 'my_gpio_block.yml'
connections:
(…)
# BSP connections
(…)
- { srcblk: my_gpio_block0, srcport: gpio, dstblk: device, dstport:
fp_gpio }
```
I hope the listings are readable now.
Kind regards,\
Jörg
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