Reviewers: jbramley, Benedikt Meurer,
Description:
Use a different variant of CpuFeatures::FlushICache asm with clang.
This variant avoids a constant pool entry, which can be problematic
when LTO'ing. It is also slightly shorter.
According to the description of https://codereview.chromium.org/335133002
some versions of GCC refuse to accept r7 as an inline asm input, so I kept
the old variant of the asm for GCC. I could not reproduce this issue with
GCC 4.8 or 4.9 though, and if I s/__clang__/1/g the code appears to compile
with GCC and be correct. We might want to try to submit this without the
GCC code path first.
R=bmeu...@chromium.org,jacob.bram...@arm.com
BUG=chromium:453195
Please review this at https://codereview.chromium.org/986643004/revert
Base URL: https://chromium.googlesource.com/v8/v8.git@master
Affected files (+13, -0 lines):
M src/arm/cpu-arm.cc
Index: src/arm/cpu-arm.cc
diff --git a/src/arm/cpu-arm.cc b/src/arm/cpu-arm.cc
index
4a340708f9334faa7a59d127e9518067beca85e4..4bbfd375a8bd2465d1433c89e7163d45086e6489
100644
--- a/src/arm/cpu-arm.cc
+++ b/src/arm/cpu-arm.cc
@@ -45,6 +45,18 @@ void CpuFeatures::FlushICache(void* start, size_t size) {
register uint32_t end asm("r1") = beg + size;
register uint32_t flg asm("r2") = 0;
+#ifdef __clang__
+ // This variant of the asm avoids a constant pool entry, which can be
+ // problematic when LTO'ing. It is also slightly shorter.
+ register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
+
+ asm volatile("svc 0\n"
+ :
+ : "r"(beg), "r"(end), "r"(flg), "r"(scno)
+ : "memory");
+#else
+ // Use a different variant of the asm with GCC because some versions
doesn't
+ // support r7 as an asm input.
asm volatile(
// This assembly works for both ARM and Thumb targets.
@@ -62,6 +74,7 @@ void CpuFeatures::FlushICache(void* start, size_t size) {
: "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
: "memory");
#endif
+#endif
}
} } // namespace v8::internal
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