Hi, I've been wondering how to go about adding general support for conditional operations in Turbofan, specifically conditional compares for AArch64. But I now see that Intel APX extensions also support more conditional instructions, beyond cmov.
I'm not a huge fan of flag continuations, as it's been too easy for me to introduce bugs while using them, so is there a safer way to approach this? Machine-level predication would seem to require a CFG in a form that isn't really available until during/after jump-threading. So a few questions about jump threading: - Could predication happen there? - Why does jump threading run so late, why not before regalloc? And, in general, what is the policy on having optimisation passes that run on machine code? Thanks, Sam -- -- v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev --- You received this message because you are subscribed to the Google Groups "v8-dev" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/v8-dev/80169017-f248-4424-89ad-97260f28643dn%40googlegroups.com.
