Can you create your own (VHDL) fold markers? (not sure if the terminolgy is
OK)
For example I have VHDL-code like below:
component bufg
port (
o : out std_ulogic;
i : in std_ulogic);
end component;
And when I'm at the first line in normal-mode and give zc command (fold
close) then I want to see it fold like:
+-- 5 lines: component bufg
I don't know enough about VHDL (make that "I really don't know
anything about VHDL syntax") to know if this is too specific:
:set foldmarker=component\ bufg,end\ component
:set foldmethod=marker
This assumes that "component bufg" always starts the block. If
"bufg" is some sort of variable/tag, you /can/ use
:set foldmarker=component,end\ component
But this will mark any place that the word "component" is used,
and could cause problems if (assuming a C++ style commenting) one
had something like
// this component
// does stuff
component bufg
port (
o : out std_ulogic;
i : in std_ulogic);
end component;
It would fold the whole lot (including the comments).
Alternatively, with manual folding, you can force them by first
clearing your folds (with "zE") and then using something like
:g/^component\s\+\w+/,/^end component/fold
The use of regexps can give you more flexibility for nailing them
down. An advantage over some of the 'foldmethod's is that you
can also create your own manual folds on top of this as desired.
This has a disadvantage that it doesn't refresh realtime, but
the pairing (zE + the :g//) can be mapped to a single keypress to
force a manual update if needed (though it will wipe out any
other manually created folds). If you have trouble understanding
what the above is doing, drop a line and I'd be glad to explain it.
I tend to go with the latter as allows me to be very precise with
my regexps and it also allows me to create manual folds in addition.
Hope this gives you some ideas to work with...
-tim
