On 12/15/2012 02:31 PM, GUGLIELMO NAVARRA wrote:
> Thanks for your reply,
> my tsc_info definition is:
>
> /*------------------------------------------------
> Timer che utilizza IPIPE
> -------------------------------------------------*/
> #ifdef CONFIG_IPIPE
> static struct __ipipe_tscinfo tsc_info = {
> .type = IPIPE_TSC_TYPE_FREERUNNING,
> .u = {
> {
> .mask = 0xffffffff,
> },
> },
> };
>
> static void l138_xenomai_tsc_init(void)
> {
> struct timer_s *t = &timers[TID_CLOCKSOURCE];
>
> tsc_info.type = IPIPE_TSC_TYPE_FREERUNNING;
> tsc_info.freq = l138_clock_tick_rate;
> tsc_info.counter_vaddr = (unsigned long)(t->base + t->tim_off);
> tsc_info.u.counter_paddr = DAVINCI_TIMER0_BASE + TIM12;
What about t->tim_off ?
> //tsc_info.u.fr.counter = (unsigned *)(t->base + t->tim_off);
> tsc_info.u.fr.mask = 0xffffffff;
> __ipipe_tsc_register(&tsc_info);
> }
>
>
> Maybe I need to control access to the timer by user-space.
> I have already enabled FCSE in "guaranteed mode".
What processor core are you using? As explained in the documentation,
FCSE is only implemented for the arm920T, arm926EJ-S and Intel xscale cores.
> You tell me that I have to implement the part of the GPIO?
Definitely, if there are some multiplexed GPIOs and some drivers
existing using them. It is optional otherwise, but if you intend to
publish your patch (which I hope you do), it is better to implement the
GPIO demultiplexing, and even the hardening of gpiolib callbacks, in
case other users of the same platform need to use GPIOs.
Please no top-posting and no private mails.
--
Gilles.
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