On Thu, Feb 4, 2010 at 10:35 PM, Bob Friesenhahn < bfrie...@simple.dallas.tx.us> wrote:
> On Thu, 4 Feb 2010, Marc Nicholas wrote: > >> >> The write IOPS between the X25-M and the X25-E are different since with >> the X25-M, much >> more of your data gets completely lost. Most of us prefer not to lose our >> data. >> >> Would you like to qualify your statement further? >> > > Google is your friend. And check earlier on this list/forum as well. > > While I understand the difference between MLC and SLC parts, I'm pretty >> sure Intel didn't >> design the M version to make "data get completely lost". ;) >> > > It loses the most recently written data, even after a cache sync request. > A number of people have verified this for themselves and posted results. > Even the X25-E has been shown to lose some transactions. > > The devices have some DRAM (16MB) that is used for write amplification levelling. The sudden loss of power means that this DRAM doesn't get flushed to Flash. This is the very reason the STEC devices have a supercap. -marc
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