It falls under “right tool for the job” scenario. If you have mature process and can offload (through design) that piece to an ASIC, in general performance of that function should increase. I know… duuh ☺
From: Af [mailto:af-boun...@afmug.com] On Behalf Of Chuck McCown Sent: Thursday, January 08, 2015 10:48 AM To: af@afmug.com Subject: Re: [AFMUG] interesting telrad video FPGAs can be reprogrammed. And they, in theory, can do everything an ASIC can do. But ASICs are not able to be changed (at least they could not when I was working with them, that has been a few years ago). From: Ken Hohhof<mailto:af...@kwisp.com> Sent: Thursday, January 08, 2015 8:43 AM To: af@afmug.com<mailto:af@afmug.com> Subject: Re: [AFMUG] interesting telrad video Painting ASICs as an old, failed approach and FPGAs as the future seems a little strange. From: That One Guy<mailto:thatoneguyst...@gmail.com> Sent: Thursday, January 08, 2015 9:37 AM To: af@afmug.com<mailto:af@afmug.com> Subject: [AFMUG] interesting telrad video https://www.youtube.com/watch?v=dzAkMGKT5_M I feel like there might be some koolaid here somewhere -- All parts should go together without forcing. You must remember that the parts you are reassembling were disassembled by you. Therefore, if you can't get them together again, there must be a reason. By all means, do not use a hammer. -- IBM maintenance manual, 1925
