I read something fairly recently that explained it was usual process these days 
to develop and test on FPGA, then once the final hardware was approved and 
tested, push the hardware and software design through a program to convert the 
FPGA stuff to ASIC.

Basically there was a point where ASIC wins at massive scale, but until that 
point FPGA was very cost effective and more developer friendly.

On January 8, 2015 7:00:06 AM AKST, Ken Hohhof <af...@kwisp.com> wrote:
>I’m just saying an FPGA approach is usually viewed as more expensive
>and power hungry, and that you do custom silicon for mass market
>products.
>
>Think UBNT and ePMP.  And if FPGAs are the wave of the future, sell
>your shares in Qualcomm and Atheros, and buy Altera.
>
>And I keep hearing that TVWS will never take off until the radio
>manufacturers move away from SDR and FPGAs and to more cost effective
>ASICs.
>
>I guess as usual, there are different flavors of koolaid.
>
>
>From: Chuck McCown 
>Sent: Thursday, January 08, 2015 9:48 AM
>To: af@afmug.com 
>Subject: Re: [AFMUG] interesting telrad video
>
>FPGAs can be reprogrammed.  And they, in theory, can do everything an
>ASIC can do.  But ASICs are not able to be changed (at least they could
>not when I was working with them, that has been a few years ago).  
>
>From: Ken Hohhof 
>Sent: Thursday, January 08, 2015 8:43 AM
>To: af@afmug.com 
>Subject: Re: [AFMUG] interesting telrad video
>
>Painting ASICs as an old, failed approach and FPGAs as the future seems
>a little strange.
>
>From: That One Guy 
>Sent: Thursday, January 08, 2015 9:37 AM
>To: af@afmug.com 
>Subject: [AFMUG] interesting telrad video
>
>https://www.youtube.com/watch?v=dzAkMGKT5_M 
>
>I feel like there might be some koolaid here somewhere
>
>
>-- 
>
>All parts should go together without forcing. You must remember that
>the parts you are reassembling were disassembled by you. Therefore, if
>you can't get them together again, there must be a reason. By all
>means, do not use a hammer. -- IBM maintenance manual, 1925

-- 
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