About a numenta type network on an fpga,  if it were just local proximal 
dendrites (ones closeby) you could probably route them directly a->b.   And if 
the network were to "evolve" you could recompile the network and update the 
FPGA to directly reflect it and take advantage of the programmability an ASIC 
doesnt have,  even tho that would take a fair bit of time normally, maybe up to 
10 minutes? if u used the average software they put out (Xilinx and Altera).    
They put out REALLY big units,   if you want to go for 10 million Look up 
Tables 
(https://www.xilinx.com/support/documentation/data_sheets/ds890-ultrascale-overview.pdf)
(https://au.element14.com/xilinx/ek-u1-vcu129-g/eval-kit-virtex-ultrascale-fpga/dp/3580744?gclid=CjwKCAjwjdOIBhA_EiwAHz8xmyAS8L4gj6Dsy5c8Cifw6FDIgfA_5pUkqlal9ucBG6gSjNRUTpM0CBoCX8cQAvD_BwE&mckv=_dc|pcrid|501152839127|pkw||pmt||slid||product|3580744|pgrid|123988903131|ptaid|pla-293946777986|&CMP=KNC-GAU-GEN-SMART-SHOPPING)
  -$ 30,000  :)

That thing would kick alot of butt,  but it is very expensive.
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