From: Eryk Brol <eryk.b...@amd.com>
[why]
Need to add new parameters to debugfs logging so
we will know what parameters DSC is using for
debug purposes. So we are adding a read function
in debugfs to read DSC status registers
Signed-off-by: Eryk Brol <eryk.b...@amd.com>
Reviewed-by: Mikita Lipski <mikita.lip...@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 516 +++++++++++++++++-
.../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 5 +
drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h | 5 +
3 files changed, 525 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index caf3beaf4b7b..8bbf54ffe01b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -33,6 +33,8 @@
#include "amdgpu_dm_debugfs.h"
#include "dm_helpers.h"
#include "dmub/dmub_srv.h"
+#include "resource.h"
+#include "dsc.h"
struct dmub_debugfs_trace_header {
uint32_t entry_count;
@@ -995,6 +997,462 @@ static ssize_t dp_dpcd_data_read(struct file *f, char
__user *buf,
return read_size - r;
}
+static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 10;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_clock_en);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_slice_width_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_slice_width);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_slice_height_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_slice_height);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_bytes_per_pixel_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_bytes_per_pixel);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_pic_width_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_pic_width);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_pic_height_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_pic_height);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_chunk_size_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_chunk_size);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
+static ssize_t dp_dsc_slice_bpg_offset_read(struct file *f, char __user *buf,
+ size_t size, loff_t *pos)
+{
+ char *rd_buf = NULL;
+ char *rd_buf_ptr = NULL;
+ struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
+ struct display_stream_compressor *dsc;
+ struct dcn_dsc_state dsc_state = {0};
+ const uint32_t rd_buf_size = 100;
+ struct pipe_ctx *pipe_ctx;
+ ssize_t result = 0;
+ int i, r, str_len = 30;
+
+ rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
+
+ if (!rd_buf)
+ return -ENOMEM;
+
+ rd_buf_ptr = rd_buf;
+
+ for (i = 0; i < MAX_PIPES; i++) {
+ pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
+ }
+
+ if (!pipe_ctx)
+ return -ENXIO;
+
+ dsc = pipe_ctx->stream_res.dsc;
+ if (dsc)
+ dsc->funcs->dsc_read_state(dsc, &dsc_state);
+
+ snprintf(rd_buf_ptr, str_len,
+ "%d\n",
+ dsc_state.dsc_slice_bpg_offset);
+ rd_buf_ptr += str_len;
+
+ while (size) {
+ if (*pos >= rd_buf_size)
+ break;
+
+ r = put_user(*(rd_buf + result), buf);
+ if (r)
+ return r; /* r = -EFAULT */
+
+ buf += 1;
+ size -= 1;
+ *pos += 1;
+ result += 1;
+ }
+
+ kfree(rd_buf);
+ return result;
+}
+
DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
DEFINE_SHOW_ATTRIBUTE(output_bpc);
@@ -1003,6 +1461,54 @@ DEFINE_SHOW_ATTRIBUTE(vrr_range);
DEFINE_SHOW_ATTRIBUTE(hdcp_sink_capability);
#endif
+static const struct file_operations dp_dsc_clock_en_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_clock_en_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_slice_width_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_slice_width_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_slice_height_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_slice_height_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_bytes_per_pixel_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_bytes_per_pixel_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_pic_width_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_pic_width_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_pic_height_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_pic_height_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_chunk_size_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_chunk_size_read,
+ .llseek = default_llseek
+};
+
+static const struct file_operations dp_dsc_slice_bpg_offset_debugfs_fops = {
+ .owner = THIS_MODULE,
+ .read = dp_dsc_slice_bpg_offset_read,
+ .llseek = default_llseek
+};
+
static const struct file_operations dp_link_settings_debugfs_fops = {
.owner = THIS_MODULE,
.read = dp_link_settings_read,
@@ -1062,7 +1568,15 @@ static const struct {
{"sdp_message", &sdp_message_fops},
{"aux_dpcd_address", &dp_dpcd_address_debugfs_fops},
{"aux_dpcd_size", &dp_dpcd_size_debugfs_fops},
- {"aux_dpcd_data", &dp_dpcd_data_debugfs_fops}
+ {"aux_dpcd_data", &dp_dpcd_data_debugfs_fops},
+ {"dsc_clock_en", &dp_dsc_clock_en_debugfs_fops},
+ {"dsc_slice_width", &dp_dsc_slice_width_debugfs_fops},
+ {"dsc_slice_height", &dp_dsc_slice_height_debugfs_fops},
+ {"dsc_bytes_per_pixel", &dp_dsc_bytes_per_pixel_debugfs_fops},
+ {"dsc_pic_width", &dp_dsc_pic_width_debugfs_fops},
+ {"dsc_pic_height", &dp_dsc_pic_height_debugfs_fops},
+ {"dsc_chunk_size", &dp_dsc_chunk_size_debugfs_fops},
+ {"dsc_slice_bpg", &dp_dsc_slice_bpg_offset_debugfs_fops}
};
#ifdef CONFIG_DRM_AMD_DC_HDCP
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
index 3c6ecfe141bb..ba50214d6c32 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
@@ -157,6 +157,11 @@ static void dsc2_read_state(struct
display_stream_compressor *dsc, struct dcn_ds
REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &s->dsc_clock_en);
REG_GET(DSCC_PPS_CONFIG3, SLICE_WIDTH, &s->dsc_slice_width);
REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bytes_per_pixel);
+ REG_GET(DSCC_PPS_CONFIG3, SLICE_HEIGHT, &s->dsc_slice_height);
+ REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size);
+ REG_GET(DSCC_PPS_CONFIG2, PIC_WIDTH, &s->dsc_pic_width);
+ REG_GET(DSCC_PPS_CONFIG2, PIC_HEIGHT, &s->dsc_pic_height);
+ REG_GET(DSCC_PPS_CONFIG7, SLICE_BPG_OFFSET, &s->dsc_slice_bpg_offset);
}
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h
b/drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h
index 7c2a3328b208..5915994f9eb8 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h
@@ -56,6 +56,11 @@ struct dcn_dsc_state {
uint32_t dsc_clock_en;
uint32_t dsc_slice_width;
uint32_t dsc_bytes_per_pixel;
+ uint32_t dsc_slice_height;
+ uint32_t dsc_pic_width;
+ uint32_t dsc_pic_height;
+ uint32_t dsc_slice_bpg_offset;
+ uint32_t dsc_chunk_size;
};
--
2.17.1
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