Am Donnerstag, den 20.04.2017, 09:04 +0100 schrieb Tristan Williams: > AVR8 watchdog (reset and interrupt) atmega328p > > I wanted to use the 128 kHz watchdog oscillator as an additional > timer.
The watchdog creates a full reset cycle, that means that the full startup sequence is performed. Your turnkey action should take care of this (register r10 holds the reset cause). > > In the source tree there is an assembler word -wdt (no-wdt.asm), > which > writes $0 to WDTCSR (using the prescribed sequence), but I couldn't > find something like a "+wdt". This may well be because I did not look > hard enough, so my apologies if it was there all along. IIRC only the "disable watchdog" sequence is timing critical (the 4 cpu cycles you mention). All other tasks can be performed at lower speed, so a forth implementation should be fine. > > Using -wdt as a template I have written four companion assembler > words > and a slightly modified version of -wdt (to leave the existing > prescaler and WDIE bit unmodified). > > +wdt ( -- ) set WDE (System Reset Mode) > -wdt ( -- ) unset WDE (leaves prescaler) > +wdi ( -- ) set WDIE (Interrupt mode) > -wdi ( -- ) unset WDIE (leaves prescaler) > wd.delay! ( n -- ) set prescaler , unset WDE and unset WDIE > > where n is the 4 bits representing the prescaler. > > With the 4 cycle write requirement dealt with by (optional at build > time) built in words the 128kHz timer is accessible and adds a > lot. Could similar words be added to AmForth or is this too > device/application specific? It would be a great contribution for the cookbook. Esp if it works with Forth code. Good work Matthias ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ Amforth-devel mailing list for http://amforth.sf.net/ Amforth-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/amforth-devel
