> program will be loaded at run time. While it is possible to generate a > relative-branch relocation entry in the ESD, I'm not aware of any > facility to have the Binder and IEWFETCH resolve this offset to a > fixed low-storage address at run time.
Pardon my ignorance, but I baffled by the fact there might be an ESD entry related to a relative branch. I understood the relative brach to brach to an address offset from the current instructions address by the specified number of halfwords. When would the binder and loader have something to do here? I had not given thought to it before, but it was mentioned in this thread that the assembler would inhibit relative branch outside of the CSECT. But if the code was not generated by the assembler, a relative branch could well be a wild branch. The hardware has not means of verifying the offset is "good", it just adds the value, right? What am I missing? A pointer to some FM to read is sufficient. -- Peter Hunkeler
