Excellent idea!  Could be a superb mechanism for setting up instruction-tracing 
or debugging software (see program TRACE390 in CBT file 391, for example) 
without the overhead of ESTAE or the (currently unsupported under z/OS) TRAP 
exits.

But perhaps not directly from any general register (think extreme EREG that 
reloads ALL registers from the last stack entry, including the one you used to 
execute the EREG, or LMG 0,15,...).  Perhaps a dedicated (set of?) "instruction 
register(s)"?  That would be cool.  Would need at least RR type instructions to 
load them from GR's.

Just dreaming . . . 

Peter

-----Original Message-----
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of John McKown
Sent: Thursday, May 11, 2017 2:39 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Performance of Decimal Floating Point Instruction

On Thu, May 11, 2017 at 1:28 PM, Charles Mills <charl...@mcn.org> wrote:

> Absent EX how do you do a variable length PACK or MVO or ...
>

​I said that I didn't _like_ EX. Not that I didn't _use_ it. I'd prefer to
"synthesize" an instruction into a 64 bit GPR​ and then "EX" the contents
of the GPR. That would allow me to do more than just modify the value in
second byte of the instruction. I understand why EX exists (just as you
have pointed out) and why it does what it does. But a more generalized
facility would be, to me, "nicer". But, in reality (which stinks in some
ways), I understand that IBM won't create a new instruction "because John
thinks it would be nice". [grin]


> Surely not with an MVI into the instruction stream ...
>
> Charles
>
>
-- 


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