<snip> If you're running z/OS on a z13 of higher (i.e. your machine a vector instruction support), would either of these two bits ever be off? </snip> Yes. Note that "machine" is only one of the factors involved. Also involved are "z/OS release" and "LOADxx MACHMIG statement options".
You should never use the vector extension facility unless bit CVTVEF is on. There is no z/OS release for which CVTVEF can be assumed to be on regardless of machine and environment (i.e., the vector extension facility is not part of any z/OS architecture levelset). When CVTVEF is on, work units generally start with the relevant CR0 bit off. The first VEF instruction results in a data exception program check (interrupt code 7). The system reacts to that by beginning vector register status save/restore for that work unit at which point that work unit will subsequently have the relevant CR0 bit on and that first VEF instruction is re-executed. The bit's being off is not relevant to much of anything; that is just a starting state. <snip> P.S. Is there a mapping macro for the control register bit flags? </snip> no. Peter Relson z/OS Core Technology Design
