nick! that is GREAT! :)
thanks for your amazing work! bruno On Wednesday 12 December 2007 16:09:31 Nick Kossifidis wrote: > I was working again on the initial register settings, i'm almost done > with 5414 and 5213 + 5112, next is 5213 + 5111, 5211 and finally 5210 > (which had a terrible bug in nic_wakeup -the whole system crashed- > that also gave me a better idea of nic_wakeup). > > Before my fixes, with the same setup (my laptop next to the ap) i > couldn't transmit above 18M (100% packet loss), after i added a static > pcdac table (for txpower) i got up to 24M, then i spend the whole > night doing dumps and comparing them and in the end i created the init > tables (didn't have any dumps for turbog but i checked out the old > values, did some tweaking and i think it's ok). After i finished, i > rebooted, compiled and voila ! > > 802.11b @ 11Mbits > [ 4] local 192.168.254.1 port 5001 connected with 192.168.254.253 port > 40071 [ 4] 0.0- 1.0 sec 564 KBytes 4.62 Mbits/sec 2.109 ms 7/ > 400 (1.8%) [ 4] 0.0- 1.0 sec 2 datagrams received out-of-order > [ 4] 1.0- 2.0 sec 848 KBytes 6.95 Mbits/sec 5.243 ms 0/ 591 (0%) > [ 4] 2.0- 3.0 sec 848 KBytes 6.95 Mbits/sec 4.925 ms 0/ 591 (0%) > [ 4] 3.0- 4.0 sec 848 KBytes 6.95 Mbits/sec 4.318 ms 0/ 591 (0%) > [ 4] 4.0- 5.0 sec 851 KBytes 6.97 Mbits/sec 4.029 ms 0/ 593 (0%) > [ 4] 5.0- 6.0 sec 851 KBytes 6.97 Mbits/sec 3.301 ms 0/ 593 (0%) > [ 4] 6.0- 7.0 sec 848 KBytes 6.95 Mbits/sec 3.217 ms 0/ 591 (0%) > [ 4] 7.0- 8.0 sec 846 KBytes 6.93 Mbits/sec 3.280 ms 0/ 589 (0%) > [ 4] 8.0- 9.0 sec 850 KBytes 6.96 Mbits/sec 2.801 ms 0/ 592 (0%) > [ 4] 9.0-10.0 sec 831 KBytes 6.81 Mbits/sec 1.880 ms 0/ 579 (0%) > [ 4] 0.0-10.1 sec 8.04 MBytes 6.71 Mbits/sec 4.992 ms 6/ 5744 > (0.1%) [ 4] 0.0-10.1 sec 3 datagrams received out-of-order > > 802.11g @ 54Mbits > [ 3] local 192.168.254.1 port 5001 connected with 192.168.254.253 port > 33202 [ 3] 0.0- 1.0 sec 982 KBytes 8.04 Mbits/sec 0.945 ms 17/ > 701 (2.4%) [ 3] 1.0- 2.0 sec 3.05 MBytes 25.6 Mbits/sec 0.230 ms 72/ > 2245 (3.2%) [ 3] 2.0- 3.0 sec 3.07 MBytes 25.7 Mbits/sec 0.073 ms > 146/ 2334 (6.3%) [ 3] 3.0- 4.0 sec 3.06 MBytes 25.7 Mbits/sec 0.098 ms > 151/ 2334 (6.5%) [ 3] 4.0- 5.0 sec 3.05 MBytes 25.6 Mbits/sec 0.087 > ms 121/ 2294 (5.3%) [ 3] 5.0- 6.0 sec 3.07 MBytes 25.7 Mbits/sec > 0.139 ms 118/ 2307 (5.1%) [ 3] 6.0- 7.0 sec 3.06 MBytes 25.7 Mbits/sec > 0.102 ms 127/ 2311 (5.5%) [ 3] 7.0- 8.0 sec 3.06 MBytes 25.7 > Mbits/sec 0.136 ms 112/ 2297 (4.9%) [ 3] 8.0- 9.0 sec 3.07 MBytes > 25.7 Mbits/sec 0.089 ms 44/ 2231 (2%) [ 3] 9.0-10.0 sec 3.07 MBytes > 25.8 Mbits/sec 0.532 ms 70/ 2263 (3.1%) [ 3] 0.0-10.0 sec 28.5 MBytes > 23.9 Mbits/sec 1.137 ms 978/21331 (4.6%) [ 3] 0.0-10.0 sec 1 > datagrams received out-of-order > > Another cool thing is that rate control algorithm this time worked out > of the box (notice the jump from 8 to 25 Mbits) ! > > We are going good ppl, after i'm done with the rest chips i'll submit > my patch series (i always try to keep things unified for all chips so > i want to compare dumps from all of them). _______________________________________________ ath5k-devel mailing list ath5k-devel@lists.ath5k.org https://lists.ath5k.org/mailman/listinfo/ath5k-devel
