On Wed, Nov 4, 2009 at 1:52 PM, Luis R. Rodriguez <mcg...@gmail.com> wrote: > On Wed, Nov 4, 2009 at 1:36 PM, Luis R. Rodriguez <mcg...@gmail.com> wrote: >> On Wed, Nov 4, 2009 at 1:30 PM, Luis R. Rodriguez <mcg...@gmail.com> wrote: >>> On Wed, Nov 4, 2009 at 12:12 PM, Nick Kossifidis <mickfl...@gmail.com> >>> wrote: >>>> 2009/11/4 Luis R. Rodriguez <mcg...@gmail.com>: >>>>> Curious if anyone recalls the issues seen with enabling MWI on ath5k. >>>>> I could have sworn there was some discussion on this but for the life >>>>> of me I cannot find it. >>>>> >>>>> Luis >>>> >>>> Maybe this one ? >>>> http://osdir.com/ml/linux.drivers.ath5k.devel/2008-07/msg00088.html >>> >>> That was it, thanks! For the record then Kyle pointed to this bug: >>> >>> http://marc.info/?t=121430463700001&r=1&w=2 >>> >>> as a reference for possible issues. >> >> Actually the threads above are for MSI, not MWI, which would be set >> with pci_set_mwi() not pci_disable_msi(). >> >> MWI is for enabling memory write invalidate. >> >> I guess we never had the MWI discussion then for ath5k, >> >> Either way I'm reluctant to enable it and was actually considering >> simplifying the the PCI cache line size thing on ath/ath5k/ath9k. Will >> send an RFC. > > Even better: I just confirmation from our systems team that our legacy > devices and 11n PCI devices don't support MWR so I'll remove all that > cruft crap.
I meant MWI of course. Luis _______________________________________________ ath5k-devel mailing list ath5k-devel@lists.ath5k.org https://lists.ath5k.org/mailman/listinfo/ath5k-devel
