I found the cause of TPC malfunction. As I assumed early, usage of AR_PHY_POWER_TX_RATE_MAX register in AR9380 is incorrect. The following lines should be removed from ar9003_phy.h file. These registers does not exists:
--- ar9003_phy.h.orig 2011-03-30 16:25:00.000000000 +0600 +++ ar9003_phy.h 2011-07-12 12:53:30.000000000 +0600 @@ -733,9 +733,6 @@ #define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN 0x0000000e #define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN_S 1 -#define AR_PHY_POWER_TX_RATE1 0x9934 -#define AR_PHY_POWER_TX_RATE2 0x9938 -#define AR_PHY_POWER_TX_RATE_MAX 0x993c #define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040 #define PHY_AGC_CLR 0x10000000 #define RFSILENT_BB 0x00002000 The AR_PHY_PWRTX_MAX register should be used instead. This register currently do not hold MAX_RATE_POWER value, but 6th bit controls the TPC enable. Now all works as expected for AR9380. Best regards, Alex. _______________________________________________ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
