jlmatrat;193721 Wrote: 
> Exposing the XILINX to the external world would make me nervous ;-)
> It definetely may work, but there are a handful of other components
> between the HCU04 and the S/PDIF jack, including a small resistor
> useful to protect from accidental shorts on cables or jacks.
> More, I'm not sure the Xilinx is able to provide enough current for a
> clean signal: actually, from the Xilinx pin#3, the signal goes through
> two buffers in parallel, followed by a capacitor, a resistor divider,
> and a small inductor. There is another inductor in the ground leg of
> the jack (on a SB2 these components are labeled C1, R2, R3, L5 and L1
> respectively, C1 being feed by HCU04 pins #10 an #12 tied together).
> I'm afraid removing all these components could actually waste, if not
> ruin, all the benefits of a better clock. 
> 
> Anyway, I'm very interested to see your test results!
> 
> JLM


I would also be concerned if I was going externally with the signal.
However, the SPDIF output is hardwired to the X03 which reclocks the
signal and sends it onward to a RAKK DACC, again hardwired. The RAKK
DAC uses an input transformer (so no inductor needed I feel) and then a
CS8416 which can accept full logic level signals (so no resistor divider
needed in the cicuit either). 

I will post the results when I get a chance to do some proper listening
and jitter tests


-- 
Jitterbug
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