Here's a question: What I/O do tyou plan to use between the FPGA and BeagleBoard? From the schematic, it seems evident that you can use one or more McBSPs (which ought to be good for SDR data traffic); do you also envision doing parallel I/O?
On Tue, May 18, 2010 at 2:30 PM, Eric Brombaugh <[email protected]> wrote: > Hi, > > A quick status on the Beagle FPGA project: > > Boards are back from the PCB fab and the first one has been assembled and > is being tested. Configuration software is available and the board is > working with both the Angstrom Stable and Unstable development trees. So far > all power, ID, clocking and configuration support circuitry is working as > designed. Off-board I/O and the remaining Beagle interface remains to be > tested. > > Find out more about this project at the following sites: > > http://members.cox.net/ebrombaugh1/embedded/beagle/beagle_fpga.html > > http://www.elinux.org/BeagleBoard_Tracker > > Please let me know if you have any questions or comments on this. > > Thanks, > > Eric > -- Steve Hersey N1XNX [email protected] ----- Each of us has strengths and talents that others don't. Whether innate or learned, these are gifts -- and a gift not shared is a sad and lonely thing. Using our gifts for the benefit of all is an ethical obligation for every intelligent being. (The magic only works if you pass it on!)
