Agree - McBSP3 looks like the best way to get streaming data into the
Beagle in such a way that it can be pre-processed in the DSP. It limits
the bandwidth a bit over trying to work out something using MMC2, but is
probably good enough for a lot of useful stuff and it will be a heckuva
lot easier to get going.
One thing to consider - setting up McBSP3 as an ordinary audio device
running at 48ksps would be a great way to bootstrap into GnuRadio - I
believe there are already audio sources/sinks that would hook right up,
and a decimating/interpolating FPGA design could probably be set up to
generate I2S-compatible data streams without too much effort, with
side-channel control for frequency and bandwidth taking place over the
SPI4 port that's already in use for the FPGA setup. I've got a TXDAC
design to plug into two of the connectors on the FPGA board out to fab
now and hope to have this testing in a few weeks.
Eric
On 05/18/2010 01:18 PM, Stephen Hersey wrote:
McBSP3 -- Bingo! That looks like the best candidate for SDR I/O; piping
data directly between the FPGA and the DSP at many Mbps means that
compute-intensive tasks can be done entirely in the DSP, or partially in
the DSP and partially in the FPGA, without needing to bother the ARM CPU
for the data transfers. Might even be able to implement a packet-radio
modem in the DSP, and pass payload data frames to and from the DSP from
the ARM CPU as a virtual-serial-port device. Time to start reading up on
the DSP system, woohoo!
Oh, and I forgot to mention it the first time: Your FPGA peripheral rocks!
Thanks, Steve
