From:  Lenny <leonhard.neuh...@gmail.com>
Reply-To:  "beagleboard@googlegroups.com" <beagleboard@googlegroups.com>
Date:  Wednesday, July 23, 2014 at 10:29 AM
To:  "beagleboard@googlegroups.com" <beagleboard@googlegroups.com>
Cc:  <sun19920...@gmail.com>
Subject:  [beagleboard] Re: How to synchronize ADC sampling clock ?

> Hi, 
> 
> if you control the ADC from the PRU, you can use the ADC in single-acquisition
> mode and perform a new acquisition every 200 PRU cycles (every microsecond)
> for example (or whatever repetition rate you want), and therefore use the 200
> MHz PRU clock as a low-jitter timer. This way you can have jitter values well
> below one microsecond. You should also be able to synchronize the PRU with an
> external clock on one of its input pins leading to the r31 register if that is
> still needed. 
> 
> There should probably be a residual timing jitter of maximally 1/24MHz (ca.
> 42ns) because (as far as i know, but im not sure) the 24 MHz ADC sampling
> clock is not intrinsically synchronized with the 200 MHz PRU clock, so once
> the PRU launches a new acquisition, it won't take place before the ADC clock
> starts a new cycle. I did not find any documentation on how the PRU and ADC
> clock signals are derived in the hardware, that is if they come from the
> master clock or not, but i did experimentally observe a jitter of a few
> percent of a microsecond.
> 
> If you want I can send you some code examples.
That sounds like a good solutions. Also, you could use a 1MHz timer which
you can synchronize to the PTP clock and then just average the ADC samples
received since the last clock interrupt.

Regards,
John
> 
> 
> Lenny
>  
> 
> 
> On Tuesday, July 22, 2014 8:08:39 AM UTC+2, sun19...@gmail.com wrote:
>> Hi, 
>> how to synchronize ADC sampling clock (CLK_M_OSC, in AM335x manual, page
>> 3731) with external 1PPS source or others?
>> I used PTP to synchronize system clock in the kernel before, however, the
>> jitter is about 30us (but I need a jitter with accuracy under 1us.).
>> So I want to synchronize ADC sampling clock(24MHz),  Is there any way to
>> synchronize it ? Is the clock of CLK_M_OSC be adjustable?
>> Thanks.
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