For PRU recommend you have a look at https://github.com/abhishek-kakkar/BeagleLogic
and also from memory there was a similar "CRO" application On Wednesday, 12 August 2015 19:54:02 UTC+10, TJF wrote: > > Hi! > > Host CPU and TSC_ADC_SS have different clock domains. Internal ADC clock > rate is 24 MHz. The theoretical maximum sample rate is 1.6 Msamples/s (= 15 > cycles@24MHz in single shot mode) or 1.74 Msamples/s (= 14 cycles in > continous mode). In praxis it's 200 ksamples/s. > > The PRUSS are first choise for real time tasks with high timing accuracy. > > Below 10 ksamples/s the CPU latency (due to Linux non-real-time-ness) is > small (less than 10 % on a vanilla system). > > When you need concrete hints, you'll have to specify your timing > requirements: > > - Is the external clock a regular pulse train? > - What frequency? > - Which maximum latency is required between clock pulse and ADC sample? > > BR > > Am Mittwoch, 12. August 2015 08:34:02 UTC+2 schrieb Valeria M.: >> >> Hi TJF, thanks for your reply! >> I was hoping not to have to resort to use PRUs D: , for now the low >> accuracy given by the ADC clock will have to do. (btw why 10 kHz accuracy? >> it's caused by Linux non-real-time-ness? Otherwise ADC clock frequency >> should be 1,6 MHz max right?) >> >> Other random question: I suppose that if I sync the BBB system clock to >> an external clock the ADC's one won't be affected by it right? I mean they >> have different time 'domain'. >> >> Corss-compiling I'll be able to debug my procject. >> >> Valeria >> >> Il giorno martedì 11 agosto 2015 21:45:09 UTC+2, TJF ha scritto: >>> >>> Hi Valeria! >>> >>> The FSM module in the TSC_ADC_SS can either get triggered by software or >>> by an external hardware event (TIMER4-7 or PRU_ICSS pr1_host_intr0). See >>> SRM >>> chapter 12 <http://www.ti.com/lit/pdf/spruh73> for details. >>> >>> The best way how to synchronize with an external clock depends on the >>> clock frequency and the timming accuracy requirements. For high accuracy or >>> above ~10 KHz you may need customized software. >>> >>> But below that frequency you may be happy with a simple solution: The >>> ADC operates at a fast sampling rate and the host CPU just reads the >>> current value when the external clock fires. This is feasible with >>> libpruio <http://beagleboard.org/project/libpruio/>. (You may see some >>> latency when the host CPU is busy by any system interrupt.) >>> >>> BR >>> >>> BTW: Cross-compiling adds further problems. Why not compiling on the BBB? >>> >> -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
