Gedare Bloom started a new discussion on bsps/riscv/riscv/include/bsp/irq.h: 
https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1391#note_158066

 > +    (x) < 
 > RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS))
 > +
 > +#ifdef RISCV_SMRNMI
 > +
 > +#define RISCV_RNMI_VECTOR_PIN_ASSERTION \
 > +  RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
 > +#define RISCV_RNMI_VECTOR_EXT_BUS_ERROR_STORE \
 > +  (RISCV_RNMI_VECTOR_PIN_ASSERTION + 1)
 > +#define RISCV_RNMI_VECTOR_EXT_BUS_ERROR_LOAD \
 > +  (RISCV_RNMI_VECTOR_PIN_ASSERTION + 2)
 > +
 > +#define RISCV_MAXIMUM_RNMI_INTERRUPTS 3
 > +
 > +#define RISCV_INTERRUPT_VECTOR_IS_RNMI(x) \
 > +  ((x) >= RISCV_RNMI_VECTOR_PIN_ASSERTION && \
 > +    (x) <= RISCV_RNMI_VECTOR_EXT_BUS_ERROR_LOAD)

this will be more future-proof by using `RISCV_MAXIMUM_RNMI_INTERRUPTS `

-- 
View it on GitLab: 
https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1391#note_158066
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