Sounds reasonable. We persisted with 11.5 for ROACH2 so far, but we feel
that it is high time we migrate to latest tools. So instead of 13.x, we are
going for the latest 14.5. Others can comment if there are any red flags in
using latest commit with 11.5.

Thanks,

Nimish


On Thu, Sep 19, 2013 at 1:54 PM, Vertatschitsch, Laura E. <
lvertatschit...@cfa.harvard.edu> wrote:

> Nimish,
>
> Thanks.  My colleagues are planning on doing exactly what you mentioned:
> programming ROACH2 KatADCs with the 11.5 tools we had used to previously
> and successfully program ROACH1.
>
> The advice I would give them after hearing this discussion is as follows:
>
> [*] build the design with their current toolflow, make sure it compiles,
> and then observe the internal KatADC snaps to see if the error Dale's error
> is recreated.
>
> [*] If so, update the mlib_devel to the latest (simple, fast, may work).
>
> [*] If error persists, upgrade to Xilinx 14.x toolflow which should yield
> success (extrapolated from the 13.x success presented in the initial email).
>
> Is that the correct summary?  I can have them try and report back on this
> issue as to where they exited this "if/then" statement.
>
> --Laura
>
> PS - my sincere apologies, Dale, for calling you Gary, earlier, I am just
> jealous of nice, short last names that are human-readable
>
>
> On Thu, Sep 19, 2013 at 1:35 PM, Nimish Sane <nimishs...@gmail.com> wrote:
>
>> Hi Laura,
>>
>> No. The one with 11.5 used an old commit
>> 1c2035ed9e4f4bcc98e9f08f2722d34dd4f10872 (Nov 12, 2012) from ska-sa.
>>
>> I believe Dave M used the latest one from casper-astro (waiting for his
>> answer).
>>
>> So, as a caveat to what Dale has mentioned in his email, the problem
>> could be between yellow blocks and not necessarily the toolflow, though I
>> do not know if yellow block has changed significantly.
>>
>> Thanks,
>>
>> Nimish
>>
>>
>> On Thu, Sep 19, 2013 at 1:03 PM, Vertatschitsch, Laura E. <
>> lvertatschit...@cfa.harvard.edu> wrote:
>>
>>> Gary,
>>>
>>> Can you confirm the same mlib_devel checkout was used for both compiles?
>>>
>>> --Laura
>>>
>>>
>>> On Thu, Sep 19, 2013 at 11:12 AM, Gary, Dale E. <dale.e.g...@njit.edu>wrote:
>>>
>>>> Hi All,
>>>>
>>>> I am not sure how many out there are using or planning to use the
>>>> KatADC boards in their projects, but I thought I would report on our
>>>> experience, which contains a  warning: Do not use Xilinx version 11.x for
>>>> ROACH2 development that includes KatADC.  We started with that version, and
>>>> did not want to slow development by upgrading.  However, snap blocks that
>>>> capture the ADC time-domain output showed numerous "glitches" like that
>>>> shown in the attached file.  The top plot shows the histogram of the two
>>>> ADC channels on a single KatADC board, while the middle plot shows the
>>>> time-domain data.  The green channel was behaving well, but the blue
>>>> channel shows many glitches, both positive and negative.  The behavior
>>>> changes whenever the ROACHes are reloaded, so that which channels are
>>>> affected can change, and can be better or worse at different times.
>>>>
>>>> We created a test design to demonstrate the problem, compiled on 11.x,
>>>> and then asked Dave MacMahon to compile the same model again on Xilinx
>>>> system generator 13.3.  We found that when the new bof file is loaded there
>>>> is no sign of the glitches.  We are now upgrading to 14.5, and will report
>>>> our experience with that later.
>>>>
>>>> There may be other reasons not to use 11.x on ROACH2, but we did not
>>>> see any other problems, including earlier tests with iADC boards.  It was
>>>> only when we began using the KatADCs that we saw these anomalies.
>>>>
>>>> Regards,
>>>> Dale
>>>>
>>>
>>>
>>
>

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