Hi Weiwei, Firstly, I am assuming you're using the DMUX 1:1 ASIAA adc5g yellow block. To use "LOW" bandwidth mode, you will need to change line 362 in the following file:
https://github.com/sma-wideband/mlib_devel/blob/master/xps_base/XPS_ROACH2_base/pcores/adc5g_dmux1_interface_v1_00_a/hdl/vhdl/adc5g_dmux1_interface.vhd#L362 Replace "HIGH" with "LOW". You will also need to change lines 99-100 in the following file: https://github.com/sma-wideband/mlib_devel/blob/master/xps_library/%40xps_adc5g/xps_adc5g.m#L99 The values for f_pfdmax and f_pfdmin need to be changed to the maximum and minimum frequencies allowed for the MMCM in "LOW" bandwidth mode. I do not know these values off the top of my head but they are available in the Virtex-6 DC and Switching Characteristics document on the Xilinx website. Then you will need to recompile. As I mentioned to you in my previous email, using this MMCM mode "has non-ideal clock-to-out timing and may cause problems when trying to calibrate out jitter due to the data capturing." I have used this mode before and ran into trouble finding an optimal MMCM clock phase which prevents glitches in the data capture logic. I believe Dave MacMahon has had similar experience with "LOW" bandwidth mode. I attempted to fix this by adding controllable IODELAYs to each data bit but fell back on just using the "HIGH" bandwidth mode. These are still available to be used but have not been fully tested for the adc5g. Best, Rurik On Fri, Nov 22, 2013 at 12:12 PM, Weiwei Sun <su...@uw.edu> wrote: > Hi Rurik and casperians, > > I run into the problem where to change the bandwidth to LOW. On xilinx > webpage, it's told to configure it with fpga_editor. However, fpga_editor > asks for mapped .ncd files, and neither matlab nor planahead could produce > the .ncd file because of the DRC runned at beginning of mapping. Could some > one give me some idea of how and from where to make this change? > > Has anyone tested that setting bandwidth to LOW with fpga clocked at > 312.5MHz (adc5g 2500MHz) would affect the performance? > > Thanks! > > Weiwei >