Hi Marc, Thanks for the reply. I would have expected that selecting the 64 MB chunk with the dram_controller register as described in the DRAM block documentation on the wiki would get around any such PPC address space limitation. Is that not the case?
Glenn On Feb 25, 2014 2:30 AM, "Marc Welz" <m...@ska.ac.za> wrote: > On Mon, Feb 24, 2014 at 7:57 PM, G Jones <glenn.calt...@gmail.com> wrote: > > Hi, > > Sorry to repost this. Just curious if anyone has experience using more > than > > 256 MB of FPGA DRAM on the ROACH, in particular through the PPC > interface. > > The PowerPC's virtual memory subsystem maps things in 256Mb > regions/segments, > and only one is used to access the FPGA(*) - so you will probably have > to implement > some sort of windowing/base+offset scheme. > > (The address space of the PowerPC is pretty constrained) > > regards > > marc >
