Hi Aravind, Great news that you are up and running. The casper-astro/mlib_devel githash tag you are showing me is the latest one and should work fine. You should now try https://github.com/casper-astro/casperfpga and reinstall the same way you did with the ska-sa casperfpga repo and just confirm that everything is in working order.
My team will update the ReadtheDocs to include the casperfpga installs to avoid confusion for others in the next couple of weeks. >>The only issue I found was that with no input the red pitaya channel outputs were close to -200 and not 0 as expected. Not sure if there is a bias in the ADCs in the board? Just remember there are also input ADC jumper settings for the Red Pitaya - Low Voltage (LV - 2 Vpp) and High Voltage (HV - 40Vpp) - see https://redpitaya.readthedocs.io/en/latest/developerGuide/125-10/vs.html. Make sure your jumper settings are set to LV. I have seen bias on the other boards. It does tend to differ from board to board. The original Red Pitaya firmware also included a calibration algorithm for the ADCs, but for our toolflow we are not using this. We have not explored the full specifications of the ADC inputs - our goal is to provide a learning platform for new CASPER users. I have noticed that if you are not using the ADC inputs then they should be terminated (50 ohm SMA termination) - I have noticed coupling between channels. For more information on the Red Pitaya ADC inputs please read the Red Pitaya ReadtheDocs in more detail. You can also contact the Red Pitaya support engineer Nicu Irima (email: nicu.iri...@redpitaya.com) who will assist you. I have also invited you to the CASPER Red Pitaya slack group - feel free to post your questions there too. Kind regards, Adam Isaacson South African Radio Astronomy Observatory (SARAO) Hardware Manager Cell: (+27) 825639602 Tel: (+27) 215067300 email: aisaac...@ska.ac.za On Thu, Apr 9, 2020 at 10:30 PM Aravind Venkitasubramony < aravind.venkitasubram...@colorado.edu> wrote: > Hi Adam > > Following your steps, I was able to successfully reinstall casperfpga and > run the python file without any errors. I get the expected version number > as you had suggested. Thanks for the detailed step by step instructions. > > The only issue I found was that with no input the red pitaya channel > outputs were close to -200 and not 0 as expected. Not sure if there is a > bias in the ADCs in the board? > > I have recompiled the tutorial 2 with the 10 bit version and attached the > .fpg file > > When I run git rev-parse --branches from inside /../../mlib_devel I get > 37cfd707e600d3ea005aa757d042084fc083c403 > > Is this what you were looking for? > > > > On Thu, Apr 9, 2020 at 1:02 AM Adam Isaacson <aisaac...@ska.ac.za> wrote: > >> Hi Aravind, >> >> If you installed the correct casperfpga then I would expect the following: >> >> aisaacson@adam-cm:~$ cd work/git_work/ska-sa/ >> aisaacson@adam-cm:~/work/git_work/ska-sa$ ipython >> Python 2.7.12 (default, Aug 22 2019, 16:36:40) >> Type "copyright", "credits" or "license" for more information. >> >> IPython 2.4.1 -- An enhanced Interactive Python. >> ? -> Introduction and overview of IPython's features. >> %quickref -> Quick reference. >> help -> Python's own help system. >> object? -> Details about 'object', use 'object??' for extra details. >> >> In [1]: import casperfpga >> >> In [2]: casperfpga.__version__ >> Out[2]: '3.2.dev856+devel.8bd4e4f' - "devel" indicates the branch and >> "8bd4e4f" represents the githash - see >> https://github.com/ska-sa/casperfpga/tree/devel. >> >> Please also send me the githash of your mlib_devel branch, so that I can >> confirm. To install casperfpga properly then please do the following: >> >> >> 1) cd /usr/local/lib/python2.7/dist-packages >> 2) sudo rm - rf casper* >> 3) Go to https://github.com/ska-sa/casperfpga/tree/devel and look at >> Readme.md file. >> 4) $ git clone https://github.com/ska-sa/casperfpga.git >> 5) cd to casperfpga install directory >> 6) git branch -a (should show that you are in master branch) >> 7) git checkout devel (should place you in devel branch) >> 8) sudo pip install -r requirements.txt >> 9) sudo python setup.py install (if done correctly then you should see >> reference to '3.2.dev856+devel.8bd4e4f in the build. >> 10) Run ipython when you are out of the casperfpga directory (cd ..) >> 11) import casperfpga >> 12) casperfpga.__version__ >> NB: I tried to do the pip install first, but it didn't install properly >> for me - this worked for me though. >> >> The attached script seems fine, but I notice that the fpg metadata was >> unable to resolve the PC hostname and so I don't see the githash of the >> mlib_devel repo. Please send that to me, thanks. I am unable to programme >> your fpg file as I have a 10 bit board with me only. Maybe try compile for >> 10 bits and at least I can test that fpg for you - this will ensure that >> your mlib_devel repo is installed correctly. >> >> Kind regards, >> >> Adam Isaacson >> South African Radio Astronomy Observatory (SARAO) >> Hardware Manager >> Cell: (+27) 825639602 >> Tel: (+27) 215067300 >> email: aisaac...@ska.ac.za >> >> >> >> On Thu, Apr 9, 2020 at 1:18 AM Aravind Venkitasubramony < >> aravind.venkitasubram...@colorado.edu> wrote: >> >>> Thanks Adam. >>> >>> I removed all the casper installs as per your instructions and >>> reinstalled casperfpga. I still get the similar error as before. And the >>> version is also showing up as unknown. >>> >>> So I removed the packages in /usr/local/.. as you said, downloaded all >>> the files in the location you had suggested, cd'ed in to the new folder and >>> installed casperfpga as mentioned in the tutorial. I am able to connect to >>> the red pitaya board, the led is blinking and everything, but get the >>> similar error as before when reading the snapshot. >>> >>> On Wed, Apr 8, 2020 at 3:00 PM Adam Isaacson <aisaac...@ska.ac.za> >>> wrote: >>> >>>> Hi Aravind, >>>> >>>> You can remove all casperfpga installs by doing the following: >>>> >>>> 1) cd /usr/local/lib/python2.7/dist-packages >>>> 2) sudo rm - rf casper* >>>> >>>> This will remove all casperfpga installs. >>>> >>>> The version of casperfpga you read back didn't look right to me. It >>>> should not be unknown. Once you install the link I sent you, you should >>>> read back the branch and githash, I think. >>>> >>>> I will look at these files tomorrow. >>>> >>>> Kind regards, >>>> >>>> Adam >>>> >>>> On Wed, 08 Apr 2020, 8:06 PM Aravind Venkitasubramony, < >>>> aravind.venkitasubram...@colorado.edu> wrote: >>>> >>>>> The version returned by is '0.0+unknown.202004081054'. >>>>> >>>>> Attached are the fpg and the py files. >>>>> >>>>> I tried to uninstall casperfpga and reinstall from the version you had >>>>> provided. But now I get an error while running ipython and typing >>>>> casperfpga in the terminal >>>>> >>>>> NameError Traceback (most recent call >>>>> last) >>>>> <ipython-input-1-1bde13f56e4f> in <module>() >>>>> ----> 1 casperfpga >>>>> >>>>> NameError: name 'casperfpga' is not defined >>>>> >>>>> I am afraid if I have messed up the casperfpga installation. Is there >>>>> a way to clean up all the casperfpga related files and install afresh? >>>>> >>>>> >>>>> >>>>> On Wed, Apr 8, 2020 at 12:58 AM Adam Isaacson <aisaac...@ska.ac.za> >>>>> wrote: >>>>> >>>>>> Dear Aravind, >>>>>> >>>>>> The slx file looks correct. This issue does look familiar to me - we >>>>>> used to have an issue with the snap shot byte ordering. I am wondering >>>>>> what >>>>>> version of casperfpga you are using? Please do the following in your >>>>>> terminal: >>>>>> >>>>>> 1) ipython >>>>>> 2) import casperfpga >>>>>> 3) casperfpga.__version__ >>>>>> >>>>>> Let me know what version you read back. >>>>>> >>>>>> I suspect you are using an old version of casperfpga with this bug. >>>>>> Try using the following version of casperfpga: >>>>>> >>>>>> https://github.com/ska-sa/casperfpga/tree/devel >>>>>> >>>>>> Please also send me your python modified test scripts and fpg >>>>>> generated file for 14 bits, thanks. >>>>>> >>>>>> Kind regards, >>>>>> >>>>>> Adam Isaacson >>>>>> South African Radio Astronomy Observatory (SARAO) >>>>>> Hardware Manager >>>>>> Cell: (+27) 825639602 >>>>>> Tel: (+27) 215067300 >>>>>> email: aisaac...@ska.ac.za >>>>>> >>>>>> >>>>>> >>>>>> On Tue, Apr 7, 2020 at 8:30 PM Aravind Venkitasubramony < >>>>>> aravind.venkitasubram...@colorado.edu> wrote: >>>>>> >>>>>>> Thanks Adam! >>>>>>> >>>>>>> That was quite helpful. I was able to find the compiled slx files >>>>>>> from the repository and comparing the two models definitely helped >>>>>>> answer a >>>>>>> lot of 101 level doubts. >>>>>>> >>>>>>> I only have the 14 bit RP board with me and I made the edits in the >>>>>>> blocks as far as I understood from the tutorial. Since there were two >>>>>>> separate yaml files for the 10 and 14 bit boards, I believe I did not >>>>>>> have >>>>>>> to make any changes there. The compile also went through without any >>>>>>> issues >>>>>>> and generated the fpg file. But when I run the python, I get the >>>>>>> following >>>>>>> error message >>>>>>> >>>>>>> connecting to the Red Pitaya... >>>>>>> done >>>>>>> programming the Red Pitaya... >>>>>>> done >>>>>>> arming snapshot block... >>>>>>> done >>>>>>> triggering the snapshot and reset the counters... >>>>>>> done >>>>>>> reading the snapshot... >>>>>>> Traceback (most recent call last): >>>>>>> File "tut_adc_dac.py", line 54, in <module> >>>>>>> adc_in = rp.snapshots.adc_in_snap_ss.read(arm=False)['data'] >>>>>>> File "/usr/local/lib/python2.7/dist-packages/casperfpga/snap.py", >>>>>>> line 227, in read >>>>>>> rawdata, rawtime = self.read_raw(**kwargs) >>>>>>> File "/usr/local/lib/python2.7/dist-packages/casperfpga/snap.py", >>>>>>> line 333, in read_raw >>>>>>> bram_dmp['length'] / (self.width_bits / 8))) >>>>>>> RuntimeError: adc_in_snap_ss.read_uint() - expected 4096 bytes, got >>>>>>> 32 >>>>>>> >>>>>>> >>>>>>> The line 227 in the snap.py mentioned here addresses something >>>>>>> specific to Red Pitaya as seen from the comments in the snap.py file >>>>>>> and I >>>>>>> did not follow what it was. >>>>>>> >>>>>>> This was the same error I got in the tutorial 3 as well in the >>>>>>> spectrometer case. Since there is no bit growth issue here in the >>>>>>> tutorial >>>>>>> 2, I am not sure why this error message shows up here as well. >>>>>>> >>>>>>> I have attached the slx and fpg files I created for a 14 bit RP >>>>>>> board for the tutorial 2. >>>>>>> >>>>>>> On Tue, Apr 7, 2020 at 2:52 AM Adam Isaacson <aisaac...@ska.ac.za> >>>>>>> wrote: >>>>>>> >>>>>>>> Dear Aravind, >>>>>>>> >>>>>>>> I have fixed your slx file - see attached. There were a few issues: >>>>>>>> >>>>>>>> 1) sw_reg reg_cntrl yellow block bitfield type was not set to >>>>>>>> boolean >>>>>>>> 2) your snapshot, adc_in_snap, was not setup correctly. You have to >>>>>>>> manually add the names in the snapshot fields - double click on the >>>>>>>> snapshot and see "input" tab >>>>>>>> 3) Your adc_sample_ctr was set to 9 bits and not 32 bits. >>>>>>>> >>>>>>>> It should compile fine now. My advice is that if you are struggling >>>>>>>> to get your slx file to compile, then look at the completed design slx >>>>>>>> file >>>>>>>> in github and make sure your design matches that. There is a completed >>>>>>>> slx >>>>>>>> model and working fpg file for each tutorial. >>>>>>>> >>>>>>>> Kind regards, >>>>>>>> >>>>>>>> Adam Isaacson >>>>>>>> South African Radio Astronomy Observatory (SARAO) >>>>>>>> Hardware Manager >>>>>>>> Cell: (+27) 825639602 >>>>>>>> Tel: (+27) 215067300 >>>>>>>> email: aisaac...@ska.ac.za >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> On Tue, Apr 7, 2020 at 10:28 AM Adam Isaacson <aisaac...@ska.ac.za> >>>>>>>> wrote: >>>>>>>> >>>>>>>>> Dear Aravind, >>>>>>>>> >>>>>>>>> Did you know there is an existing, working and completed slx file >>>>>>>>> (tut_adc_dac.slx) for this tutorial in: >>>>>>>>> >>>>>>>>> >>>>>>>>> https://github.com/casper-astro/tutorials_devel/tree/master/red_pitaya/tut_adc_dac >>>>>>>>> >>>>>>>>> I would compare that file with your file attached and look for any >>>>>>>>> differences. I am also going to look at your file and see if I can >>>>>>>>> spot >>>>>>>>> anything. Stay tuned. >>>>>>>>> >>>>>>>>> Kind regards, >>>>>>>>> >>>>>>>>> Adam Isaacson >>>>>>>>> South African Radio Astronomy Observatory (SARAO) >>>>>>>>> Hardware Manager >>>>>>>>> Cell: (+27) 825639602 >>>>>>>>> Tel: (+27) 215067300 >>>>>>>>> email: aisaac...@ska.ac.za >>>>>>>>> >>>>>>>>> git clone https://github.com/casper-astro/casperfpga >>>>>>>>> $ cd casperfpga/ >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> On Tue, Apr 7, 2020 at 1:53 AM Aravind Venkitasubramony < >>>>>>>>> arve9...@colorado.edu> wrote: >>>>>>>>> >>>>>>>>>> Hi >>>>>>>>>> >>>>>>>>>> I followed the tutorial and created the .slx file. While >>>>>>>>>> compiling I got these errors from simulink. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> Matching "From" for "Goto" 'rp_tut2/adc_in_snap/ss/goto_ss_we1' >>>>>>>>>> not found [4 similar] >>>>>>>>>> Component:Simulink | Category:Block warning >>>>>>>>>> Output port 1 of 'rp_tut2/dac/rp_tut2_dac_dac0_data_i_in' is not >>>>>>>>>> connected. [8 similar] >>>>>>>>>> Component:Simulink | Category:Block warning >>>>>>>>>> The input type propagated to this block did not match the >>>>>>>>>> specified type. >>>>>>>>>> Expected Type: Bool >>>>>>>>>> Actual Type: Fix_10_0 >>>>>>>>>> >>>>>>>>>> Error occurred during "Rate and Type Error Checking". >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> Reported by: >>>>>>>>>> 'rp_tut2/adc_in_snap/assert_b' >>>>>>>>>> A summary of Sysgen errors has been written to >>>>>>>>>> '/home/cet/RP_work/models/rp_tut2/rp_tut2_sysgen_error.log' >>>>>>>>>> >>>>>>>>>> Reported by: >>>>>>>>>> 'rp_tut2/adc_in_snap/assert_b' >>>>>>>>>> >>>>>>>>>> I also notice that I do not get the "in_adc_data_valid" port >>>>>>>>>> shown in the in the bit field snap block on the tutorial page. Other >>>>>>>>>> than >>>>>>>>>> that, I recreated everything as mentioned in the tutorial page. I >>>>>>>>>> have >>>>>>>>>> attached the .slx and the sysgen error log files also alongwith >>>>>>>>>> >>>>>>>>>> -- >>>>>>>>>> You received this message because you are subscribed to the >>>>>>>>>> Google Groups "casper@lists.berkeley.edu" group. >>>>>>>>>> To unsubscribe from this group and stop receiving emails from it, >>>>>>>>>> send an email to casper+unsubscr...@lists.berkeley.edu. >>>>>>>>>> To view this discussion on the web visit >>>>>>>>>> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/ddcf80a1-1118-4262-94a1-1e7cc66f0056%40lists.berkeley.edu >>>>>>>>>> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/ddcf80a1-1118-4262-94a1-1e7cc66f0056%40lists.berkeley.edu?utm_medium=email&utm_source=footer> >>>>>>>>>> . >>>>>>>>>> >>>>>>>>> -- >>>>>>>> You received this message because you are subscribed to the Google >>>>>>>> Groups "casper@lists.berkeley.edu" group. >>>>>>>> To unsubscribe from this group and stop receiving emails from it, >>>>>>>> send an email to cas <casper+unsubscr...@lists.berkeley.edu> >>>>>>>> >>>>>>>> git clone https://github.com/casper-astro/casperfpga >>>>>>>> $ cd casperfpga/ >>>>>>>> >>>>>>>> per+unsubscr...@lists.berkeley.edu >>>>>>>> <casper+unsubscr...@lists.berkeley.edu>. >>>>>>>> To view this discussion on the web visit >>>>>>>> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CADTJ%3DnFCBeu6L8r5Rc14hGQ8UX2M6b8dX%3DbfEqOgk5XsRnv76g%40mail.gmail.com >>>>>>>> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CADTJ%3DnFCBeu6L8r5Rc14hGQ8UX2M6b8dX%3DbfEqOgk5XsRnv76g%40mail.gmail.com?utm_medium=email&utm_source=footer> >>>>>>>> . >>>>>>>> >>>>>>> -- >>>>>>> You received this message because you are subscribed to the Google >>>>>>> Groups "casper@lists.berkeley.edu" group. >>>>>>> To unsubscribe from this group and stop receiving emails from it, >>>>>>> send an email to casper+unsubscr...@lists.berkeley.edu. >>>>>>> To view this discussion on the web visit >>>>>>> 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