hi sivasankar,

you are correct, the biplex fft's also have multiple inputs, but they are
used in a different way:
instead of multiple time samples from a single real ADC to process higher
data rates than the FFT clock rate,
the biplex FFT's compute two or four FFTs simultaneously.
e.g. you can compute four independent spectra from four different ADCs.
if you only have one spectrum you want to compute, you can connect the
unused biplex input channels to ground.

i don't know why you can't calibrate both 16 input adc boards in your
system.
hopefully other casperites can weigh in.
can you calibrate board 1 by itself?
can you calibrate board 2 by itself ?
can you calibrate board 1, and then board 2?
can you calibrate board 2, and then board 1 ?

best wishes,

dan


On Mon, Mar 18, 2024 at 8:42 PM Sivakumar Sivasankar <sivasiva8...@gmail.com>
wrote:

> Hi dan,
>     Thank you for your immediate response. In the fft_biplex_real blocks
> also they have at least two simultaneous input paths. So how can I split
> the one channel ADC output stream(200MHz) into multiple paths to give it to
> FFT block? Even if i find a method to do that, It will reduce the sampling
> rate of the input stream no?
>
> I am using ROACH2 revision 2 board. It has two 16 channel ADC cards. I
> want to calibrate both the ADC cards at the same time. That’s why I
> mentioned as 32 channel ADC calibration.
>
> Thank you.
>
> Sivasankar.S
>
> On Mon, Mar 18, 2024 at 11:10 PM 'Dan Werthimer' via
> casper@lists.berkeley.edu <casper@lists.berkeley.edu> wrote:
>
>>
>> hi sivakumar,
>>
>> for low sample rate FFT's (where the FPGA clock = sample rate),  i
>> suggest you consider:
>> fft_biplex_real_2x
>> <https://casper-toolflow.readthedocs.io/en/stable/src/blockdocs/Fft_biplex_real_2x.html>
>>  (Real-sampled
>> Biplex FFT, with Output Demuxed by 2)
>> fft_biplex_real_4x
>> <https://casper-toolflow.readthedocs.io/en/stable/src/blockdocs/Fft_biplex_real_4x.html>
>>  (Real-sampled
>> Biplex FFT, with Output Demuxed by 4)
>>
>> the various casper FFT's are listed here:
>> https://casper-toolflow.readthedocs.io/en/stable/blockdocumentation.html
>>
>> what is the 32 input ADC board you are trying to calibrate ?
>> is this the board designed by larry dedarrio for the LWA ?
>>
>> best wishes,
>>
>> dan
>>
>>
>> On Mon, Mar 18, 2024 at 7:53 PM Sivasankar <sivasiva8...@gmail.com>
>> wrote:
>>
>>> Dear Caspers,
>>>          Currently I am facing an issue with 32 ADC channel calibration
>>> with ROACH2 rev2 board. The script for 16-ADC channel calibration is
>>> working fine and it has calibrated successfully. I have used the same
>>> script and changed the 16 ADC design to 32 ADC channel. I have selected
>>> adc0_clk as the User IP clock and given 230MHz. But It is giving the below
>>> error. Can anyone please help me to debug this issue?
>>>
>>>   Also, I want to design a FFT operation to a single channel from 16 ADC
>>> channels with a sampling rate of 200MHz. But I couldn't find any single
>>> input path FFT cores in casper library. All the FFT cores are coming with
>>> at least 4 simultaneous input paths with a single simultaneous input
>>> stream. Are there any possible blocks with a single input path so that I
>>> can do FFT(clocking with fabric clk 200MHz) to a 200MHz single channel from
>>> the ADC output?
>>>
>>> Thank you in advance
>>>
>>> Sivasankar.S
>>>
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