*From:* Jon Elson via cctalk <cctalk@classiccmp.org>
*Subject:* [cctalk] Re: Bendix G-15 Restoration
*Date:* Monday, October 10, 2022 at 7:35 AM
*To:* Christian Corti via cctalk <cctalk@classiccmp.org>
*Cc:* Jon Elson <el...@pico-systems.com>
On Sat, 8 Oct 2022, Paul Kimpel wrote:
modify a lot of the software. Timing dependencies aside, G-15
instructions didn't have addresses -- they had "timing numbers" that
effectively told the hardware how long to wait before reading or
writing a word on the drum.
Well, No, I believe that each instruction had the address of the next
instruction in it. That allowed you to jump to another track for the
next instruction in the sequence. Instruction addresses were not that
many bits.
Jon
Not quite. A G-15 instruction had two fields, T and N, each seven bits,
that looked like sector addresses, and you could often think of them as
sector addresses, but doing so carelessly could get you into trouble.
N is the easiest one to understand. That was the sector "address" of the
next instruction to be executed, which except in the case of two
instructions had to be in the same line (track) of the drum as the
current instruction. The problem is that the field could hold values
from 0-127, but the words around the drum were numbered 0-107, and it
was perfectly valid (and sometimes even useful) to specify a value of N
in the range 108-127.
What actually happened is that the processor subtracted the N value from
the word number of the current instruction (termed L), stored the
truncated difference in a seven-bit field of a hidden register on the
drum named the Command (CM) register, and then as each word passed the
read head of the drum, counted that field up until it overflowed its
seven-bit size. At that point the drum was in the correct position to
read the next instruction.
Actually, it was a bit more complicated than that, because the
arithmetic in CM was being done modulo 128, but the word addressing was
modulo 108. The processor handled that by adding an additional 20 to the
CM field if the drum passed word 107 before the count overflowed. There
was an additional complication in that the adjustment did not take place
if you executed an instruction from word 107, in which case the
programmer had to bias their timing numbers by 20 instead to accomplish
the adjustment. It was a lovely machine to program.
You can read how the sausage was made in the Theory of Operation manual,
section C-17, starting on page 40 (page 46 of the PDF):
http://bitsavers.org/pdf/bendix/g-15/60121600_G15_Theory_Of_Operation_Nov64.pdf
There were 20 108-word lines (0-19) and four 4-word lines (20-23) on the
drum that software could access, but instructions could be executed only
from lines 0-5, 19, and 23. A register in the processor determined which
line was currently selected to execute instructions, so execution stayed
on that line until it was changed by either a Select Command Line/Mark
Exit or Select Command Line/Return Exit instruction. Those were the only
ways to branch from line to line.
The T field in an instruction can be thought of as the operand address,
and often effectively was, but you had to be careful with that idea,
too. It was called T because it was the "timing number" for the
instruction's execution. Instructions had two modes, Immediate and
Deferred, determined by the I/D bit in the instruction word.
Deferred mode is easier to understand. Like N, the difference between it
and L was stored in a field of CM and counted up until it overflowed. At
that point the processor would access the word(s) under the read and/or
write head on the line(s) selected by the S and D fields of the
instruction. In this mode, T effectively told the processor how long to
wait until the operand word(s) were in position, so it was very much
like an operand address.
In Immediate mode for most instructions, however, the operand data
started at L+1, the word number immediately after that of the
instruction. T specified how many words the instruction would process,
but in a weird way -- processing started with the word at L+1 but ended
at T-1. A really lovely machine to program.
In Immediate mode for a few instructions (multiply, divide, the shifts),
T actually specified the number of word-times the instruction would
take, but instead of processing words from the storage lines on the
drum, it processed them in the double-precision registers, which were
also on the drum. For shifts, each two counts of T would shift one bit;
for multiply and divide, each two counts of T would develop an
additional bit of the result. See the ToO manual, section D-10, D-11,
D-12, and D-13 starting on page 53.
So that's why I say the G-15 didn't have addresses. But then, it didn't
really have op codes, either.
For some insight into how advantageous use could be made of non-obvious
values for the N and T fields in G-15 instructions, see this blog post
describing a program that would clear the G-15 drum memory, its
registers, and a couple of other things in just four words:
https://retro-emulation.blogspot.com/2022/06/
Paul
