I’m all but certain that the 16500 series is a 68k not PA-RISC though. Robert Johnson --- Telegram: @alohawolf Telephone:+1-206-683-5108 C*NET: 18219881 Email:al...@blastpuppy.com -- "Follow the path of the unsafe, independent thinker. Expose your ideas to the danger of controversy. Speak your mind and fear less the label of "crackpot" than the stigma of conformity."
- Thomas J. Watson Sr. > On Jun 20, 2024, at 04:15, Eric Smith via cctalk <cctalk@classiccmp.org> > wrote: > > On Thu, Jun 20, 2024 at 2:13 AM Adrian Godwin via cctalk < > cctalk@classiccmp.org> wrote: > >> I'm interested in this. I'm looking at the bottom end, the bus and cards, >> but there may be information we can share. >> > > That's where I'm starting, too. I'm using a 16500A (rather than a B, C, or > 1670x) because it should be much simpler to figure out how the processor > accesses the registers and memory of the modules. Then it should be > possible to build something like a USB4 PCIe alternate mode interface to > the analyzer backplane, replacing the analyzer's CPU card. > > I don't intend to reverse-engineer details of how the modules actually > work. Instead, I want to run the real 16700 software in simulation or > binary translation on a PC. > > The tricky part is going to be figuring out how the module correlation > circuitry on the CPU board works, because my plan requires reproducing that.
