jasonliu added inline comments.
================
Comment at: clang/lib/CodeGen/TargetInfo.cpp:1547
// Otherwise, if the type contains an SSE vector type, the alignment is 16.
+ if (Align >= 16 && (isSIMDVectorType(getContext(), Ty) ||
----------------
Xiangling_L wrote:
> Also update the comment?
I think the comment is fine. It's still SSE vector type even if we changed the
query to SIMD. SSE is for x86 and altivec is for Power, but they are both SIMD
vectors.
================
Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
return false;
case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
return true;
----------------
Xiangling_L wrote:
> I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a check
> to emit an error for using this option within cc1. But in your patch, this
> option only emit error when invoked by the driver. Does that mean we are
> pretty sure this option is doing what we want on AIX?
Are you able to set this CodeGen option when it is disabled in the
Frontend/CompilerInvocation.cpp?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79035/new/
https://reviews.llvm.org/D79035
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
