dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
Thanks. LGTM
================
Comment at: llvm/test/CodeGen/AArch64/neon_rbit.ll:9
+
+define <8 x i8> @rbit_8x8(<8 x i8> %A) nounwind {
+; CHECK-LABEL: rbit_8x8:
----------------
v8i8 and v8i16 are fine for this patch. They others were not valid
aarch64.neon.rbit intrinsics anyway.
Also, it may be better to make this an opt test, I'm not sure. It's probably
fine either way.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D102397/new/
https://reviews.llvm.org/D102397
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