joshua-arch1 added a comment. In D147610#4294260 <https://reviews.llvm.org/D147610#4294260>, @craig.topper wrote:
> In D147610#4294247 <https://reviews.llvm.org/D147610#4294247>, @joshua-arch1 > wrote: > >> I'm wondering whether it is appropriate to just use FPR16 for the >> destination of fcvt.bf16.s? The destination is in BF16 format instead of >> simple FP16. Your implemention looks like just replacing fcvt.h.s with >> fcvt.bf16.s. Do we need to define a new register class? > > Registers classes only distinguished by the registers in them and what their > alignment and spill size are. It doesn't define anything about the format of > the register. A BF16 specific register class would be identical in those > properties to the FPR16 register class. Do you have any plan for code generation of these instructions with corresponding intrinsics? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147610/new/ https://reviews.llvm.org/D147610 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
