craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:6769
+let hasSideEffects = 0 in {
+defm PseudoVFWCVT_F_XU : VPseudoVWCVTF_V_RM;
+defm PseudoVFWCVT_F_X : VPseudoVWCVTF_V_RM;
----------------
craig.topper wrote:
> These don't need rounding mode. As the spec ssys "A double-width IEEE
> floating-point value can always represent a single-width integer exactly."
> Not sure why they had an FRM use before.
>
> I'm also very unsure why PseudoVFWCVT_RM_F_XU and PseudoVFWCVT_RM_F_X exist.
Fixed by https://reviews.llvm.org/D154653
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D154635/new/
https://reviews.llvm.org/D154635
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