aeubanks added a comment. In D154093#4648986 <https://reviews.llvm.org/D154093#4648986>, @aeubanks wrote:
> In D154093#4648931 <https://reviews.llvm.org/D154093#4648931>, @eaeltsin > wrote: > >> This might have another issue with Verilog - >> >> < import "AAA-BBB" foo bar baz >> --- >> > import {"AAA-", >> > "BBB"} foo bar baz >> >> I wonder if Verilog allows breaking strings in `import`? > > From the spec: > `dpi_spec_string ::= "DPI-C" | "DPI"` > Seems like it can't. Sent out https://github.com/llvm/llvm-project/pull/66951 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154093/new/ https://reviews.llvm.org/D154093 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits