================
@@ -80,6 +80,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public
TargetInfo {
bool IsISA3_0 = false;
bool IsISA3_1 = false;
bool HasQuadwordAtomics = false;
+ bool FullRegisterNames = false;
----------------
chenzheng1030 wrote:
Using a target feature bit for assembly printing seems not match other bits.
IIUC, all the bits here should control the available instructions on a
subtarget.
Could we use an option in `TargetMachine::Options::MCOptions`? this looks like
the way where clang can accept an option and control the code generation in the
backend. The current option `Options.MCOptions.PreserveAsmComments` seems a
little similar with this functionality.
https://github.com/llvm/llvm-project/pull/70255
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