================
@@ -29,6 +29,12 @@ namespace llvm {
class StringRef;
class SparcSubtarget : public SparcGenSubtargetInfo {
+ // Reserve*Register[i] - *#i is not available as a general purpose register.
+ BitVector ReserveGRegister;
----------------
koachan wrote:
It should be possible, however my concern is that [the
flags](https://github.com/llvm/llvm-project/pull/74927/files#diff-cf43b5b875187dc9a8dc30d7cd08b1595d63286ef469df03d7f89c92fa294fb5R68-R81)
need to be defined in terms of register names, and tablegen seems to not like
doing arithmetic inside the `"Reserve*Register["#i#"]"` parts?
https://github.com/llvm/llvm-project/pull/74927
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