[clang] [clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (PR #105930)

[Amr Hesham via cfe-commits]

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@@ -16,262 +16,220 @@
 #ifdef __HLSL_ENABLE_16_BIT
 // DXIL_NATIVE_HALF: define noundef i1 @
 // SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.i16
+// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.[[ICF:dx]].all.i16
+// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.[[ICF:spv]].all.i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_int16_t(int16_t p0) { return all(p0); }
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AmrDeveloper wrote:

Thats a lot better i did that for all.hlsl tests and will check other files

Thank you

https://github.com/llvm/llvm-project/pull/105930
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