https://github.com/AmrDeveloper updated 
https://github.com/llvm/llvm-project/pull/105930

>From 33b59a3cc600081fab5d8862b521d4ea929d566a Mon Sep 17 00:00:00 2001
From: AmrDeveloper <am...@programmer.net>
Date: Sat, 24 Aug 2024 10:08:23 +0200
Subject: [PATCH] [clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use
 temp var

Update all hybird DXIL/SPIRV codegen tests to use temp variable
representing interchange target
---
 .../builtins/RWBuffer-constructor.hlsl        |   2 +-
 clang/test/CodeGenHLSL/builtins/all.hlsl      | 268 ++++++------------
 clang/test/CodeGenHLSL/builtins/any.hlsl      | 264 ++++++-----------
 clang/test/CodeGenHLSL/builtins/frac.hlsl     |  84 +++---
 clang/test/CodeGenHLSL/builtins/lerp.hlsl     |  58 ++--
 clang/test/CodeGenHLSL/builtins/mad.hlsl      |  16 +-
 .../test/CodeGenHLSL/builtins/normalize.hlsl  |  73 ++---
 clang/test/CodeGenHLSL/builtins/rsqrt.hlsl    |  84 +++---
 .../semantics/DispatchThreadID.hlsl           |  14 +-
 9 files changed, 315 insertions(+), 548 deletions(-)

diff --git a/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl 
b/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
index e51eac7f57c2d3..baddfcf2cf1d52 100644
--- a/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
@@ -9,4 +9,4 @@ RWBuffer<float> Buf;
 // CHECK: store ptr %[[HandleRes]], ptr %h, align 4
 
 // CHECK-SPIRV: %[[HandleRes:[0-9]+]] = call ptr @llvm.spv.create.handle(i8 1)
-// CHECK-SPIRV: store ptr %[[HandleRes]], ptr %h, align 8
+// CHECK-SPIRV: store ptr %[[HandleRes]], ptr %h, align 8
\ No newline at end of file
diff --git a/clang/test/CodeGenHLSL/builtins/all.hlsl 
b/clang/test/CodeGenHLSL/builtins/all.hlsl
index b48daa287480ff..39f364c5953d60 100644
--- a/clang/test/CodeGenHLSL/builtins/all.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/all.hlsl
@@ -1,277 +1,193 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF,SPIR_NATIVE_HALF,SPIR_CHECK
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,SPIR_NO_HALF,SPIR_CHECK
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF,DXIL_NATIVE_HALF,DXIL_CHECK
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,DXIL_NO_HALF,DXIL_CHECK
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 
 #ifdef __HLSL_ENABLE_16_BIT
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_int16_t(int16_t p0) { return all(p0); }
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v2i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v2i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_int16_t2(int16_t2 p0) { return all(p0); }
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v3i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v3i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_int16_t3(int16_t3 p0) { return all(p0); }
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v4i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v4i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_int16_t4(int16_t4 p0) { return all(p0); }
-
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_uint16_t(uint16_t p0) { return all(p0); }
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v2i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v2i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_uint16_t2(uint16_t2 p0) { return all(p0); }
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v3i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v3i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_uint16_t3(uint16_t3 p0) { return all(p0); }
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v4i16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v4i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i16
 // NATIVE_HALF: ret i1 %hlsl.all
 bool test_all_uint16_t4(uint16_t4 p0) { return all(p0); }
 #endif // __HLSL_ENABLE_16_BIT
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.f16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.f16
-// DXIL_NO_HALF: %hlsl.all = call i1 @llvm.dx.all.f32
-// SPIR_NO_HALF: %hlsl.all = call i1 @llvm.spv.all.f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.f16
+// NO_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_half(half p0) { return all(p0); }
-
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v2f16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v2f16
-// DXIL_NO_HALF: %hlsl.all = call i1 @llvm.dx.all.v2f32
-// SPIR_NO_HALF: %hlsl.all = call i1 @llvm.spv.all.v2f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2f16
+// NO_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_half2(half2 p0) { return all(p0); }
-
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v3f16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v3f16
-// DXIL_NO_HALF: %hlsl.all = call i1 @llvm.dx.all.v3f32
-// SPIR_NO_HALF: %hlsl.all = call i1 @llvm.spv.all.v3f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3f16
+// NO_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_half3(half3 p0) { return all(p0); }
-
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.all = call i1 @llvm.dx.all.v4f16
-// SPIR_NATIVE_HALF: %hlsl.all = call i1 @llvm.spv.all.v4f16
-// DXIL_NO_HALF: %hlsl.all = call i1 @llvm.dx.all.v4f32
-// SPIR_NO_HALF: %hlsl.all = call i1 @llvm.spv.all.v4f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4f16
+// NO_HALF: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_half4(half4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.f32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_float(float p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2f32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_float2(float2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3f32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_float3(float3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4f32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4f32
 // CHECK: ret i1 %hlsl.all
 bool test_all_float4(float4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.f64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.f64
 // CHECK: ret i1 %hlsl.all
 bool test_all_double(double p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2f64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2f64
 // CHECK: ret i1 %hlsl.all
 bool test_all_double2(double2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3f64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3f64
 // CHECK: ret i1 %hlsl.all
 bool test_all_double3(double3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4f64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4f64
 // CHECK: ret i1 %hlsl.all
 bool test_all_double4(double4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_int(int p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_int2(int2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_int3(int3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_int4(int4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint(uint p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint2(uint2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint3(uint3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4i32
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i32
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint4(uint4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_int64_t(int64_t p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_int64_t2(int64_t2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_int64_t3(int64_t3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_int64_t4(int64_t4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint64_t(uint64_t p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint64_t2(uint64_t2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint64_t3(uint64_t3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4i64
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i64
 // CHECK: ret i1 %hlsl.all
 bool test_all_uint64_t4(uint64_t4 p0) { return all(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.i1
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.i1
 // CHECK: ret i1 %hlsl.all
 bool test_all_bool(bool p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v2i1
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v2i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v2i1
 // CHECK: ret i1 %hlsl.all
 bool test_all_bool2(bool2 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v3i1
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v3i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v3i1
 // CHECK: ret i1 %hlsl.all
 bool test_all_bool3(bool3 p0) { return all(p0); }
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.all = call i1 @llvm.dx.all.v4i1
-// SPIR_CHECK: %hlsl.all = call i1 @llvm.spv.all.v4i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.all = call i1 @llvm.[[TARGET]].all.v4i1
 // CHECK: ret i1 %hlsl.all
 bool test_all_bool4(bool4 p0) { return all(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/any.hlsl 
b/clang/test/CodeGenHLSL/builtins/any.hlsl
index 84584281a3b7d2..3d9d8e9e689ed0 100644
--- a/clang/test/CodeGenHLSL/builtins/any.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/any.hlsl
@@ -1,304 +1,224 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF,SPIR_NATIVE_HALF,SPIR_CHECK
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,SPIR_NO_HALF,SPIR_CHECK
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ 
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF,DXIL_NATIVE_HALF,DXIL_CHECK
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,DXIL_NO_HALF,DXIL_CHECK
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 
 #ifdef __HLSL_ENABLE_16_BIT
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_int16_t(int16_t p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v2i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v2i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_int16_t2(int16_t2 p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v3i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v3i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_int16_t3(int16_t3 p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v4i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v4i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_int16_t4(int16_t4 p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_uint16_t(uint16_t p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v2i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v2i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_uint16_t2(uint16_t2 p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v3i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v3i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_uint16_t3(uint16_t3 p0) { return any(p0); }
 
-// DXIL_NATIVE_HALF: define noundef i1 @
-// SPIR_NATIVE_HALF: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v4i16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v4i16
+// NATIVE_HALF: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i16
 // NATIVE_HALF: ret i1 %hlsl.any
 bool test_any_uint16_t4(uint16_t4 p0) { return any(p0); }
 #endif // __HLSL_ENABLE_16_BIT
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.f16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.f16
-// DXIL_NO_HALF: %hlsl.any = call i1 @llvm.dx.any.f32
-// SPIR_NO_HALF: %hlsl.any = call i1 @llvm.spv.any.f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.f16
+// NO_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_half(half p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v2f16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v2f16
-// DXIL_NO_HALF: %hlsl.any = call i1 @llvm.dx.any.v2f32
-// SPIR_NO_HALF: %hlsl.any = call i1 @llvm.spv.any.v2f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2f16
+// NO_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_half2(half2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v3f16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v3f16
-// DXIL_NO_HALF: %hlsl.any = call i1 @llvm.dx.any.v3f32
-// SPIR_NO_HALF: %hlsl.any = call i1 @llvm.spv.any.v3f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3f16
+// NO_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_half3(half3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_NATIVE_HALF: %hlsl.any = call i1 @llvm.dx.any.v4f16
-// SPIR_NATIVE_HALF: %hlsl.any = call i1 @llvm.spv.any.v4f16
-// DXIL_NO_HALF: %hlsl.any = call i1 @llvm.dx.any.v4f32
-// SPIR_NO_HALF: %hlsl.any = call i1 @llvm.spv.any.v4f32
+// CHECK: define [[FNATTRS]] i1 @
+// NATIVE_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4f16
+// NO_HALF: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_half4(half4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.f32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_float(float p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2f32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_float2(float2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3f32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_float3(float3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4f32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4f32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4f32
 // CHECK: ret i1 %hlsl.any
 bool test_any_float4(float4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.f64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.f64
 // CHECK: ret i1 %hlsl.any
 bool test_any_double(double p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2f64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2f64
 // CHECK: ret i1 %hlsl.any
 bool test_any_double2(double2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3f64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3f64
 // CHECK: ret i1 %hlsl.any
 bool test_any_double3(double3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4f64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4f64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4f64
 // CHECK: ret i1 %hlsl.any
 bool test_any_double4(double4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_int(int p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_int2(int2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_int3(int3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_int4(int4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint(uint p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint2(uint2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint3(uint3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4i32
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4i32
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i32
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint4(uint4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_int64_t(int64_t p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_int64_t2(int64_t2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_int64_t3(int64_t3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_int64_t4(int64_t4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint64_t(uint64_t p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint64_t2(uint64_t2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint64_t3(uint64_t3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4i64
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4i64
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i64
 // CHECK: ret i1 %hlsl.any
 bool test_any_uint64_t4(uint64_t4 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.i1
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.i1
 // CHECK: ret i1 %hlsl.any
 bool test_any_bool(bool p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v2i1
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v2i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v2i1
 // CHECK: ret i1 %hlsl.any
 bool test_any_bool2(bool2 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v3i1
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v3i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v3i1
 // CHECK: ret i1 %hlsl.any
 bool test_any_bool3(bool3 p0) { return any(p0); }
 
-// DXIL_CHECK: define noundef i1 @
-// SPIR_CHECK: define spir_func noundef i1 @
-// DXIL_CHECK: %hlsl.any = call i1 @llvm.dx.any.v4i1
-// SPIR_CHECK: %hlsl.any = call i1 @llvm.spv.any.v4i1
+// CHECK: define [[FNATTRS]] i1 @
+// CHECK: %hlsl.any = call i1 @llvm.[[TARGET]].any.v4i1
 // CHECK: ret i1 %hlsl.any
 bool test_any_bool4(bool4 p0) { return any(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/frac.hlsl 
b/clang/test/CodeGenHLSL/builtins/frac.hlsl
index b457f5c2787918..f0fbba978c0237 100644
--- a/clang/test/CodeGenHLSL/builtins/frac.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/frac.hlsl
@@ -1,84 +1,64 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,SPIR_CHECK,NATIVE_HALF,SPIR_NATIVE_HALF
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,SPIR_CHECK,NO_HALF,SPIR_NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 
-// DXIL_NATIVE_HALF: define noundef half @
-// SPIR_NATIVE_HALF: define spir_func noundef half @
-// DXIL_NATIVE_HALF: %hlsl.frac = call half @llvm.dx.frac.f16(
-// SPIR_NATIVE_HALF: %hlsl.frac = call half @llvm.spv.frac.f16(
+// NATIVE_HALF: define [[FNATTRS]] half @
+// NATIVE_HALF: %hlsl.frac = call half @llvm.[[TARGET]].frac.f16(
 // NATIVE_HALF: ret half %hlsl.frac
-// DXIL_NO_HALF: define noundef float @
-// SPIR_NO_HALF: define spir_func noundef float @
-// DXIL_NO_HALF: %hlsl.frac = call float @llvm.dx.frac.f32(
-// SPIR_NO_HALF: %hlsl.frac = call float @llvm.spv.frac.f32(
+// NO_HALF: define [[FNATTRS]] float @
+// NO_HALF: %hlsl.frac = call float @llvm.[[TARGET]].frac.f32(
 // NO_HALF: ret float %hlsl.frac
 half test_frac_half(half p0) { return frac(p0); }
-// DXIL_NATIVE_HALF: define noundef <2 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <2 x half> @
-// DXIL_NATIVE_HALF: %hlsl.frac = call <2 x half> @llvm.dx.frac.v2f16
-// SPIR_NATIVE_HALF: %hlsl.frac = call <2 x half> @llvm.spv.frac.v2f16
+// NATIVE_HALF: define [[FNATTRS]] <2 x half> @
+// NATIVE_HALF: %hlsl.frac = call <2 x half> @llvm.[[TARGET]].frac.v2f16
 // NATIVE_HALF: ret <2 x half> %hlsl.frac
-// DXIL_NO_HALF: define noundef <2 x float> @
-// SPIR_NO_HALF: define spir_func noundef <2 x float> @
-// DXIL_NO_HALF: %hlsl.frac = call <2 x float> @llvm.dx.frac.v2f32(
-// SPIR_NO_HALF: %hlsl.frac = call <2 x float> @llvm.spv.frac.v2f32(
+// NO_HALF: define [[FNATTRS]] <2 x float> @
+// NO_HALF: %hlsl.frac = call <2 x float> @llvm.[[TARGET]].frac.v2f32(
 // NO_HALF: ret <2 x float> %hlsl.frac
 half2 test_frac_half2(half2 p0) { return frac(p0); }
-// DXIL_NATIVE_HALF: define noundef <3 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <3 x half> @
-// DXIL_NATIVE_HALF: %hlsl.frac = call <3 x half> @llvm.dx.frac.v3f16
-// SPIR_NATIVE_HALF: %hlsl.frac = call <3 x half> @llvm.spv.frac.v3f16
+// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
+// NATIVE_HALF: %hlsl.frac = call <3 x half> @llvm.[[TARGET]].frac.v3f16
 // NATIVE_HALF: ret <3 x half> %hlsl.frac
-// DXIL_NO_HALF: define noundef <3 x float> @
-// SPIR_NO_HALF: define spir_func noundef <3 x float> @
-// DXIL_NO_HALF: %hlsl.frac = call <3 x float> @llvm.dx.frac.v3f32(
-// SPIR_NO_HALF: %hlsl.frac = call <3 x float> @llvm.spv.frac.v3f32(
+// NO_HALF: define [[FNATTRS]] <3 x float> @
+// NO_HALF: %hlsl.frac = call <3 x float> @llvm.[[TARGET]].frac.v3f32(
 // NO_HALF: ret <3 x float> %hlsl.frac
 half3 test_frac_half3(half3 p0) { return frac(p0); }
-// DXIL_NATIVE_HALF: define noundef <4 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <4 x half> @
-// DXIL_NATIVE_HALF: %hlsl.frac = call <4 x half> @llvm.dx.frac.v4f16
-// SPIR_NATIVE_HALF: %hlsl.frac = call <4 x half> @llvm.spv.frac.v4f16
+// NATIVE_HALF: define [[FNATTRS]] <4 x half> @
+// NATIVE_HALF: %hlsl.frac = call <4 x half> @llvm.[[TARGET]].frac.v4f16
 // NATIVE_HALF: ret <4 x half> %hlsl.frac
-// DXIL_NO_HALF: define noundef <4 x float> @
-// SPIR_NO_HALF: define spir_func noundef <4 x float> @
-// DXIL_NO_HALF: %hlsl.frac = call <4 x float> @llvm.dx.frac.v4f32(
-// SPIR_NO_HALF: %hlsl.frac = call <4 x float> @llvm.spv.frac.v4f32(
+// NO_HALF: define [[FNATTRS]] <4 x float> @
+// NO_HALF: %hlsl.frac = call <4 x float> @llvm.[[TARGET]].frac.v4f32(
 // NO_HALF: ret <4 x float> %hlsl.frac
 half4 test_frac_half4(half4 p0) { return frac(p0); }
 
-// DXIL_CHECK: define noundef float @
-// SPIR_CHECK: define spir_func noundef float @
-// DXIL_CHECK: %hlsl.frac = call float @llvm.dx.frac.f32(
-// SPIR_CHECK: %hlsl.frac = call float @llvm.spv.frac.f32(
+// CHECK: define [[FNATTRS]] float @
+// CHECK: %hlsl.frac = call float @llvm.[[TARGET]].frac.f32(
 // CHECK: ret float %hlsl.frac
 float test_frac_float(float p0) { return frac(p0); }
-// DXIL_CHECK: define noundef <2 x float> @
-// SPIR_CHECK: define spir_func noundef <2 x float> @
-// DXIL_CHECK: %hlsl.frac = call <2 x float> @llvm.dx.frac.v2f32
-// SPIR_CHECK: %hlsl.frac = call <2 x float> @llvm.spv.frac.v2f32
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.frac = call <2 x float> @llvm.[[TARGET]].frac.v2f32
 // CHECK: ret <2 x float> %hlsl.frac
 float2 test_frac_float2(float2 p0) { return frac(p0); }
-// DXIL_CHECK: define noundef <3 x float> @
-// SPIR_CHECK: define spir_func noundef <3 x float> @
-// DXIL_CHECK: %hlsl.frac = call <3 x float> @llvm.dx.frac.v3f32
-// SPIR_CHECK: %hlsl.frac = call <3 x float> @llvm.spv.frac.v3f32
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.frac = call <3 x float> @llvm.[[TARGET]].frac.v3f32
 // CHECK: ret <3 x float> %hlsl.frac
 float3 test_frac_float3(float3 p0) { return frac(p0); }
-// DXIL_CHECK: define noundef <4 x float> @
-// SPIR_CHECK: define spir_func noundef <4 x float> @
-// DXIL_CHECK: %hlsl.frac = call <4 x float> @llvm.dx.frac.v4f32
-// SPIR_CHECK: %hlsl.frac = call <4 x float> @llvm.spv.frac.v4f32
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.frac = call <4 x float> @llvm.[[TARGET]].frac.v4f32
 // CHECK: ret <4 x float> %hlsl.frac
 float4 test_frac_float4(float4 p0) { return frac(p0); }
diff --git a/clang/test/CodeGenHLSL/builtins/lerp.hlsl 
b/clang/test/CodeGenHLSL/builtins/lerp.hlsl
index 53ac24dd456930..298d157da00a35 100644
--- a/clang/test/CodeGenHLSL/builtins/lerp.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/lerp.hlsl
@@ -1,88 +1,76 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF,SPIR_NATIVE_HALF,SPIR_CHECK
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,NO_HALF,SPIR_NO_HALF,SPIR_CHECK
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 
-
-// DXIL_NATIVE_HALF: %hlsl.lerp = call half @llvm.dx.lerp.f16(half %{{.*}}, 
half %{{.*}}, half %{{.*}})
-// SPIR_NATIVE_HALF: %hlsl.lerp = call half @llvm.spv.lerp.f16(half %{{.*}}, 
half %{{.*}}, half %{{.*}})
+// NATIVE_HALF: %hlsl.lerp = call half @llvm.[[TARGET]].lerp.f16(half %{{.*}}, 
half %{{.*}}, half %{{.*}})
 // NATIVE_HALF: ret half %hlsl.lerp
-// DXIL_NO_HALF: %hlsl.lerp = call float @llvm.dx.lerp.f32(float %{{.*}}, 
float %{{.*}}, float %{{.*}})
-// SPIR_NO_HALF: %hlsl.lerp = call float @llvm.spv.lerp.f32(float %{{.*}}, 
float %{{.*}}, float %{{.*}})
+// NO_HALF: %hlsl.lerp = call float @llvm.[[TARGET]].lerp.f32(float %{{.*}}, 
float %{{.*}}, float %{{.*}})
 // NO_HALF: ret float %hlsl.lerp
 half test_lerp_half(half p0) { return lerp(p0, p0, p0); }
 
-// DXIL_NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.dx.lerp.v2f16(<2 x 
half> %{{.*}}, <2 x half> %{{.*}}, <2 x half> %{{.*}})
-// SPIR_NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.spv.lerp.v2f16(<2 x 
half> %{{.*}}, <2 x half> %{{.*}}, <2 x half> %{{.*}})
+// NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.[[TARGET]].lerp.v2f16(<2 x 
half> %{{.*}}, <2 x half> %{{.*}}, <2 x half> %{{.*}})
 // NATIVE_HALF: ret <2 x half> %hlsl.lerp
-// DXIL_NO_HALF: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> 
%{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
-// SPIR_NO_HALF: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x 
float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
+// NO_HALF: %hlsl.lerp = call <2 x float> @llvm.[[TARGET]].lerp.v2f32(<2 x 
float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
 // NO_HALF: ret <2 x float> %hlsl.lerp
 half2 test_lerp_half2(half2 p0) { return lerp(p0, p0, p0); }
 
-// DXIL_NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.dx.lerp.v3f16(<3 x 
half> %{{.*}}, <3 x half> %{{.*}}, <3 x half> %{{.*}})
-// SPIR_NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.spv.lerp.v3f16(<3 x 
half> %{{.*}}, <3 x half> %{{.*}}, <3 x half> %{{.*}})
+// NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.[[TARGET]].lerp.v3f16(<3 x 
half> %{{.*}}, <3 x half> %{{.*}}, <3 x half> %{{.*}})
 // NATIVE_HALF: ret <3 x half> %hlsl.lerp
-// DXIL_NO_HALF: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> 
%{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
-// SPIR_NO_HALF: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x 
float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
+// NO_HALF: %hlsl.lerp = call <3 x float> @llvm.[[TARGET]].lerp.v3f32(<3 x 
float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
 // NO_HALF: ret <3 x float> %hlsl.lerp
 half3 test_lerp_half3(half3 p0) { return lerp(p0, p0, p0); }
 
-// DXIL_NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.dx.lerp.v4f16(<4 x 
half> %{{.*}}, <4 x half> %{{.*}}, <4 x half> %{{.*}})
-// SPIR_NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.spv.lerp.v4f16(<4 x 
half> %{{.*}}, <4 x half> %{{.*}}, <4 x half> %{{.*}})
+// NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.[[TARGET]].lerp.v4f16(<4 x 
half> %{{.*}}, <4 x half> %{{.*}}, <4 x half> %{{.*}})
 // NATIVE_HALF: ret <4 x half> %hlsl.lerp
-// DXIL_NO_HALF: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
-// SPIR_NO_HALF: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x 
float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+// NO_HALF: %hlsl.lerp = call <4 x float> @llvm.[[TARGET]].lerp.v4f32(<4 x 
float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
 // NO_HALF: ret <4 x float> %hlsl.lerp
 half4 test_lerp_half4(half4 p0) { return lerp(p0, p0, p0); }
 
-// DXIL_CHECK: %hlsl.lerp = call float @llvm.dx.lerp.f32(float %{{.*}}, float 
%{{.*}}, float %{{.*}})
-// SPIR_CHECK: %hlsl.lerp = call float @llvm.spv.lerp.f32(float %{{.*}}, float 
%{{.*}}, float %{{.*}})
+// CHECK: %hlsl.lerp = call float @llvm.[[TARGET]].lerp.f32(float %{{.*}}, 
float %{{.*}}, float %{{.*}})
 // CHECK: ret float %hlsl.lerp
 float test_lerp_float(float p0) { return lerp(p0, p0, p0); }
 
-// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> 
%{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
-// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> 
%{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
+// CHECK: %hlsl.lerp = call <2 x float> @llvm.[[TARGET]].lerp.v2f32(<2 x 
float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
 // CHECK: ret <2 x float> %hlsl.lerp
 float2 test_lerp_float2(float2 p0) { return lerp(p0, p0, p0); }
 
-// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> 
%{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
-// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> 
%{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
+// CHECK: %hlsl.lerp = call <3 x float> @llvm.[[TARGET]].lerp.v3f32(<3 x 
float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
 // CHECK: ret <3 x float> %hlsl.lerp
 float3 test_lerp_float3(float3 p0) { return lerp(p0, p0, p0); }
 
-// DXIL_CHECK: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
-// SPIR_CHECK: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+// CHECK: %hlsl.lerp = call <4 x float> @llvm.[[TARGET]].lerp.v4f32(<4 x 
float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
 // CHECK: ret <4 x float> %hlsl.lerp
 float4 test_lerp_float4(float4 p0) { return lerp(p0, p0, p0); }
 
 // CHECK: %[[b:.*]] = load <2 x float>, ptr %p1.addr, align 8
 // CHECK: %[[c:.*]] = load <2 x float>, ptr %p1.addr, align 8
-// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> 
%splat.splat, <2 x float> %[[b]], <2 x float> %[[c]])
-// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> 
%splat.splat, <2 x float> %[[b]], <2 x float> %[[c]])
+// CHECK: %hlsl.lerp = call <2 x float> @llvm.[[TARGET]].lerp.v2f32(<2 x 
float> %splat.splat, <2 x float> %[[b]], <2 x float> %[[c]])
 // CHECK: ret <2 x float> %hlsl.lerp
 float2 test_lerp_float2_splat(float p0, float2 p1) { return lerp(p0, p1, p1); }
 
 // CHECK: %[[b:.*]] = load <3 x float>, ptr %p1.addr, align 16
 // CHECK: %[[c:.*]] = load <3 x float>, ptr %p1.addr, align 16
-// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> 
%splat.splat, <3 x float> %[[b]], <3 x float> %[[c]])
-// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> 
%splat.splat, <3 x float> %[[b]], <3 x float> %[[c]])
+// CHECK: %hlsl.lerp = call <3 x float> @llvm.[[TARGET]].lerp.v3f32(<3 x 
float> %splat.splat, <3 x float> %[[b]], <3 x float> %[[c]])
 // CHECK: ret <3 x float> %hlsl.lerp
 float3 test_lerp_float3_splat(float p0, float3 p1) { return lerp(p0, p1, p1); }
 
 // CHECK: %[[b:.*]] = load <4 x float>, ptr %p1.addr, align 16
 // CHECK: %[[c:.*]] = load <4 x float>, ptr %p1.addr, align 16
-// DXIL_CHECK: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> 
%splat.splat, <4 x float> %[[b]], <4 x float> %[[c]])
-// SPIR_CHECK: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> 
%splat.splat, <4 x float> %[[b]], <4 x float> %[[c]])
+// CHECK: %hlsl.lerp = call <4 x float> @llvm.[[TARGET]].lerp.v4f32(<4 x 
float> %splat.splat, <4 x float> %[[b]], <4 x float> %[[c]])
 // CHECK:  ret <4 x float> %hlsl.lerp
 float4 test_lerp_float4_splat(float p0, float4 p1) { return lerp(p0, p1, p1); }
diff --git a/clang/test/CodeGenHLSL/builtins/mad.hlsl 
b/clang/test/CodeGenHLSL/builtins/mad.hlsl
index 449a793caf93b7..fa0a5ced1ba20b 100644
--- a/clang/test/CodeGenHLSL/builtins/mad.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/mad.hlsl
@@ -15,49 +15,49 @@
 // RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,SPIR_CHECK
 
 #ifdef __HLSL_ENABLE_16_BIT
-// DXIL_NATIVE_HALF: %dx.umad = call i16 @llvm.dx.umad.i16(i16 %0, i16 %1, i16 
%2)
+// DXIL_NATIVE_HALF: %dx.umad = call i16 @llvm.[[ICF:dx]].umad.i16(i16 %0, i16 
%1, i16 %2)
 // DXIL_NATIVE_HALF: ret i16 %dx.umad
 // SPIR_NATIVE_HALF: mul nuw i16 %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nuw i16 %{{.*}}, %{{.*}}
 uint16_t test_mad_uint16_t(uint16_t p0, uint16_t p1, uint16_t p2) { return 
mad(p0, p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.umad = call <2 x i16>  @llvm.dx.umad.v2i16(<2 x i16> 
%0, <2 x i16> %1, <2 x i16> %2)
+// DXIL_NATIVE_HALF: %dx.umad = call <2 x i16>  @llvm.[[ICF]].umad.v2i16(<2 x 
i16> %0, <2 x i16> %1, <2 x i16> %2)
 // DXIL_NATIVE_HALF: ret <2 x i16> %dx.umad
 // SPIR_NATIVE_HALF: mul nuw <2 x i16>  %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nuw <2 x i16>  %{{.*}}, %{{.*}}
 uint16_t2 test_mad_uint16_t2(uint16_t2 p0, uint16_t2 p1, uint16_t2 p2) { 
return mad(p0, p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.umad = call <3 x i16>  @llvm.dx.umad.v3i16(<3 x i16> 
%0, <3 x i16> %1, <3 x i16> %2)
+// DXIL_NATIVE_HALF: %dx.umad = call <3 x i16>  @llvm.[[ICF]].umad.v3i16(<3 x 
i16> %0, <3 x i16> %1, <3 x i16> %2)
 // DXIL_NATIVE_HALF: ret <3 x i16> %dx.umad
 // SPIR_NATIVE_HALF: mul nuw <3 x i16>  %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nuw <3 x i16>  %{{.*}}, %{{.*}}
 uint16_t3 test_mad_uint16_t3(uint16_t3 p0, uint16_t3 p1, uint16_t3 p2) { 
return mad(p0, p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.umad = call <4 x i16>  @llvm.dx.umad.v4i16(<4 x i16> 
%0, <4 x i16> %1, <4 x i16> %2)
+// DXIL_NATIVE_HALF: %dx.umad = call <4 x i16>  @llvm.[[ICF]].umad.v4i16(<4 x 
i16> %0, <4 x i16> %1, <4 x i16> %2)
 // DXIL_NATIVE_HALF: ret <4 x i16> %dx.umad
 // SPIR_NATIVE_HALF: mul nuw <4 x i16>  %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nuw <4 x i16>  %{{.*}}, %{{.*}}
 uint16_t4 test_mad_uint16_t4(uint16_t4 p0, uint16_t4 p1, uint16_t4 p2) { 
return mad(p0, p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.imad = call i16 @llvm.dx.imad.i16(i16 %0, i16 %1, i16 
%2)
+// DXIL_NATIVE_HALF: %dx.imad = call i16 @llvm.[[ICF]].imad.i16(i16 %0, i16 
%1, i16 %2)
 // DXIL_NATIVE_HALF: ret i16 %dx.imad
 // SPIR_NATIVE_HALF: mul nsw i16 %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nsw i16 %{{.*}}, %{{.*}}
 int16_t test_mad_int16_t(int16_t p0, int16_t p1, int16_t p2) { return mad(p0, 
p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.imad = call <2 x i16>  @llvm.dx.imad.v2i16(<2 x i16> 
%0, <2 x i16> %1, <2 x i16> %2)
+// DXIL_NATIVE_HALF: %dx.imad = call <2 x i16>  @llvm.[[ICF]].imad.v2i16(<2 x 
i16> %0, <2 x i16> %1, <2 x i16> %2)
 // DXIL_NATIVE_HALF: ret <2 x i16> %dx.imad
 // SPIR_NATIVE_HALF: mul nsw <2 x i16>  %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nsw <2 x i16>  %{{.*}}, %{{.*}}
 int16_t2 test_mad_int16_t2(int16_t2 p0, int16_t2 p1, int16_t2 p2) { return 
mad(p0, p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.imad = call <3 x i16>  @llvm.dx.imad.v3i16(<3 x i16> 
%0, <3 x i16> %1, <3 x i16> %2)
+// DXIL_NATIVE_HALF: %dx.imad = call <3 x i16>  @llvm.[[ICF]].imad.v3i16(<3 x 
i16> %0, <3 x i16> %1, <3 x i16> %2)
 // DXIL_NATIVE_HALF: ret <3 x i16> %dx.imad
 // SPIR_NATIVE_HALF: mul nsw <3 x i16>  %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nsw <3 x i16>  %{{.*}}, %{{.*}}
 int16_t3 test_mad_int16_t3(int16_t3 p0, int16_t3 p1, int16_t3 p2) { return 
mad(p0, p1, p2); }
 
-// DXIL_NATIVE_HALF: %dx.imad = call <4 x i16>  @llvm.dx.imad.v4i16(<4 x i16> 
%0, <4 x i16> %1, <4 x i16> %2)
+// DXIL_NATIVE_HALF: %dx.imad = call <4 x i16>  @llvm.[[ICF]].imad.v4i16(<4 x 
i16> %0, <4 x i16> %1, <4 x i16> %2)
 // DXIL_NATIVE_HALF: ret <4 x i16> %dx.imad
 // SPIR_NATIVE_HALF: mul nsw <4 x i16>  %{{.*}}, %{{.*}}
 // SPIR_NATIVE_HALF: add nsw <4 x i16>  %{{.*}}, %{{.*}}
diff --git a/clang/test/CodeGenHLSL/builtins/normalize.hlsl 
b/clang/test/CodeGenHLSL/builtins/normalize.hlsl
index 213959e77e7e1e..4b6be58eb048c0 100644
--- a/clang/test/CodeGenHLSL/builtins/normalize.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/normalize.hlsl
@@ -1,60 +1,52 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF,DXIL_CHECK \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,DXIL_CHECK \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,NATIVE_HALF,SPIR_NATIVE_HALF,SPIR_CHECK
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF,SPIR_CHECK \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,NO_HALF,SPIR_NO_HALF,SPIR_CHECK
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,SPIR_CHECK \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 
-// DXIL_NATIVE_HALF: define noundef half @
-// SPIR_NATIVE_HALF: define spir_func noundef half @
-// DXIL_NATIVE_HALF: call half @llvm.dx.normalize.f16(half
-// SPIR_NATIVE_HALF: call half @llvm.spv.normalize.f16(half
-// DXIL_NO_HALF: call float @llvm.dx.normalize.f32(float
-// SPIR_NO_HALF: call float @llvm.spv.normalize.f32(float
+// NATIVE_HALF: define [[FNATTRS]] half @
+// NATIVE_HALF: call half @llvm.[[TARGET]].normalize.f16(half
+// NO_HALF: call float @llvm.[[TARGET]].normalize.f32(float
 // NATIVE_HALF: ret half
 // NO_HALF: ret float
 half test_normalize_half(half p0)
 {
     return normalize(p0);
 }
-// DXIL_NATIVE_HALF: define noundef <2 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <2 x half> @
-// DXIL_NATIVE_HALF: call <2 x half> @llvm.dx.normalize.v2f16(<2 x half>
-// SPIR_NATIVE_HALF: call <2 x half> @llvm.spv.normalize.v2f16(<2 x half>
-// DXIL_NO_HALF: call <2 x float> @llvm.dx.normalize.v2f32(<2 x float>
-// SPIR_NO_HALF: call <2 x float> @llvm.spv.normalize.v2f32(<2 x float>
+// NATIVE_HALF: define [[FNATTRS]] <2 x half> @
+// NATIVE_HALF: call <2 x half> @llvm.[[TARGET]].normalize.v2f16(<2 x half>
+// NO_HALF: call <2 x float> @llvm.[[TARGET]].normalize.v2f32(<2 x float>
 // NATIVE_HALF: ret <2 x half> %hlsl.normalize
 // NO_HALF: ret <2 x float> %hlsl.normalize
 half2 test_normalize_half2(half2 p0)
 {
     return normalize(p0);
 }
-// DXIL_NATIVE_HALF: define noundef <3 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <3 x half> @
-// DXIL_NATIVE_HALF: call <3 x half> @llvm.dx.normalize.v3f16(<3 x half>
-// SPIR_NATIVE_HALF: call <3 x half> @llvm.spv.normalize.v3f16(<3 x half>
-// DXIL_NO_HALF: call <3 x float> @llvm.dx.normalize.v3f32(<3 x float>
-// SPIR_NO_HALF: call <3 x float> @llvm.spv.normalize.v3f32(<3 x float>
+// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
+// NATIVE_HALF: call <3 x half> @llvm.[[TARGET]].normalize.v3f16(<3 x half>
+// NO_HALF: call <3 x float> @llvm.[[TARGET]].normalize.v3f32(<3 x float>
 // NATIVE_HALF: ret <3 x half> %hlsl.normalize
 // NO_HALF: ret <3 x float> %hlsl.normalize
 half3 test_normalize_half3(half3 p0)
 {
     return normalize(p0);
 }
-// DXIL_NATIVE_HALF: define noundef <4 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <4 x half> @
-// DXIL_NATIVE_HALF: call <4 x half> @llvm.dx.normalize.v4f16(<4 x half>
-// SPIR_NATIVE_HALF: call <4 x half> @llvm.spv.normalize.v4f16(<4 x half>
-// DXIL_NO_HALF: call <4 x float> @llvm.dx.normalize.v4f32(<4 x float>
-// SPIR_NO_HALF: call <4 x float> @llvm.spv.normalize.v4f32(<4 x float>
+// NATIVE_HALF: define [[FNATTRS]] <4 x half> @
+// NATIVE_HALF: call <4 x half> @llvm.[[TARGET]].normalize.v4f16(<4 x half>
+// NO_HALF: call <4 x float> @llvm.[[TARGET]].normalize.v4f32(<4 x float>
 // NATIVE_HALF: ret <4 x half> %hlsl.normalize
 // NO_HALF: ret <4 x float> %hlsl.normalize
 half4 test_normalize_half4(half4 p0)
@@ -62,37 +54,30 @@ half4 test_normalize_half4(half4 p0)
     return normalize(p0);
 }
 
-// DXIL_CHECK: define noundef float @
-// SPIR_CHECK: define spir_func noundef float @
-// DXIL_CHECK: call float @llvm.dx.normalize.f32(float
-// SPIR_CHECK: call float @llvm.spv.normalize.f32(float
+// CHECK: define [[FNATTRS]] float @
+// CHECK: call float @llvm.[[TARGET]].normalize.f32(float
 // CHECK: ret float
 float test_normalize_float(float p0)
 {
     return normalize(p0);
 }
-// DXIL_CHECK: define noundef <2 x float> @
-// SPIR_CHECK: define spir_func noundef <2 x float> @
-// DXIL_CHECK: %hlsl.normalize = call <2 x float> @llvm.dx.normalize.v2f32(
-// SPIR_CHECK: %hlsl.normalize = call <2 x float> @llvm.spv.normalize.v2f32(<2 
x float>
+// CHECK: define [[FNATTRS]] <2 x float> @
+// DXIL_CHECK: %hlsl.normalize = call <2 x float> 
@llvm.[[TARGET]].normalize.v2f32(
+// SPIR_CHECK: %hlsl.normalize = call <2 x float> 
@llvm.[[TARGET]].normalize.v2f32(<2 x float>
 // CHECK: ret <2 x float> %hlsl.normalize
 float2 test_normalize_float2(float2 p0)
 {
     return normalize(p0);
 }
-// DXIL_CHECK: define noundef <3 x float> @
-// SPIR_CHECK: define spir_func noundef <3 x float> @
-// DXIL_CHECK: %hlsl.normalize = call <3 x float> @llvm.dx.normalize.v3f32(
-// SPIR_CHECK: %hlsl.normalize = call <3 x float> @llvm.spv.normalize.v3f32(<3 
x float>
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.normalize = call <3 x float> @llvm.[[TARGET]].normalize.v3f32(
 // CHECK: ret <3 x float> %hlsl.normalize
 float3 test_normalize_float3(float3 p0)
 {
     return normalize(p0);
 }
-// DXIL_CHECK: define noundef <4 x float> @
-// SPIR_CHECK: define spir_func noundef <4 x float> @
-// DXIL_CHECK: %hlsl.normalize = call <4 x float> @llvm.dx.normalize.v4f32(
-// SPIR_CHECK: %hlsl.normalize = call <4 x float> @llvm.spv.normalize.v4f32(
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.normalize = call <4 x float> @llvm.[[TARGET]].normalize.v4f32(
 // CHECK: ret <4 x float> %hlsl.normalize
 float4 test_length_float4(float4 p0)
 {
diff --git a/clang/test/CodeGenHLSL/builtins/rsqrt.hlsl 
b/clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
index bb96ad8ea0fc6e..b1b53fc187da67 100644
--- a/clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
@@ -1,84 +1,64 @@
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS=noundef -DTARGET=dx
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -fnative-half-type \
 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
-// RUN:   --check-prefixes=CHECK,SPIR_CHECK,NATIVE_HALF,SPIR_NATIVE_HALF
+// RUN:   --check-prefixes=CHECK,NATIVE_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
 // RUN:   spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
-// RUN:   -o - | FileCheck %s 
--check-prefixes=CHECK,SPIR_CHECK,NO_HALF,SPIR_NO_HALF
+// RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
+// RUN:   -DFNATTRS="spir_func noundef" -DTARGET=spv
 
-// DXIL_NATIVE_HALF: define noundef half @
-// SPIR_NATIVE_HALF: define spir_func noundef half @
-// DXIL_NATIVE_HALF: %hlsl.rsqrt = call half @llvm.dx.rsqrt.f16(
-// SPIR_NATIVE_HALF: %hlsl.rsqrt = call half @llvm.spv.rsqrt.f16(
+// NATIVE_HALF: define [[FNATTRS]] half @
+// NATIVE_HALF: %hlsl.rsqrt = call half @llvm.[[TARGET]].rsqrt.f16(
 // NATIVE_HALF: ret half %hlsl.rsqrt
-// DXIL_NO_HALF: define noundef float @
-// SPIR_NO_HALF: define spir_func noundef float @
-// DXIL_NO_HALF: %hlsl.rsqrt = call float @llvm.dx.rsqrt.f32(
-// SPIR_NO_HALF: %hlsl.rsqrt = call float @llvm.spv.rsqrt.f32(
+// NO_HALF: define [[FNATTRS]] float @
+// NO_HALF: %hlsl.rsqrt = call float @llvm.[[TARGET]].rsqrt.f32(
 // NO_HALF: ret float %hlsl.rsqrt
 half test_rsqrt_half(half p0) { return rsqrt(p0); }
-// DXIL_NATIVE_HALF: define noundef <2 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <2 x half> @
-// DXIL_NATIVE_HALF: %hlsl.rsqrt = call <2 x half> @llvm.dx.rsqrt.v2f16
-// SPIR_NATIVE_HALF: %hlsl.rsqrt = call <2 x half> @llvm.spv.rsqrt.v2f16
+// NATIVE_HALF: define [[FNATTRS]] <2 x half> @
+// NATIVE_HALF: %hlsl.rsqrt = call <2 x half> @llvm.[[TARGET]].rsqrt.v2f16
 // NATIVE_HALF: ret <2 x half> %hlsl.rsqrt
-// DXIL_NO_HALF: define noundef <2 x float> @
-// SPIR_NO_HALF: define spir_func noundef <2 x float> @
-// DXIL_NO_HALF: %hlsl.rsqrt = call <2 x float> @llvm.dx.rsqrt.v2f32(
-// SPIR_NO_HALF: %hlsl.rsqrt = call <2 x float> @llvm.spv.rsqrt.v2f32(
+// NO_HALF: define [[FNATTRS]] <2 x float> @
+// NO_HALF: %hlsl.rsqrt = call <2 x float> @llvm.[[TARGET]].rsqrt.v2f32(
 // NO_HALF: ret <2 x float> %hlsl.rsqrt
 half2 test_rsqrt_half2(half2 p0) { return rsqrt(p0); }
-// DXIL_NATIVE_HALF: define noundef <3 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <3 x half> @
-// DXIL_NATIVE_HALF: %hlsl.rsqrt = call <3 x half> @llvm.dx.rsqrt.v3f16
-// SPIR_NATIVE_HALF: %hlsl.rsqrt = call <3 x half> @llvm.spv.rsqrt.v3f16
+// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
+// NATIVE_HALF: %hlsl.rsqrt = call <3 x half> @llvm.[[TARGET]].rsqrt.v3f16
 // NATIVE_HALF: ret <3 x half> %hlsl.rsqrt
-// DXIL_NO_HALF: define noundef <3 x float> @
-// SPIR_NO_HALF: define spir_func noundef <3 x float> @
-// DXIL_NO_HALF: %hlsl.rsqrt = call <3 x float> @llvm.dx.rsqrt.v3f32(
-// SPIR_NO_HALF: %hlsl.rsqrt = call <3 x float> @llvm.spv.rsqrt.v3f32(
+// NO_HALF: define [[FNATTRS]] <3 x float> @
+// NO_HALF: %hlsl.rsqrt = call <3 x float> @llvm.[[TARGET]].rsqrt.v3f32(
 // NO_HALF: ret <3 x float> %hlsl.rsqrt
 half3 test_rsqrt_half3(half3 p0) { return rsqrt(p0); }
-// DXIL_NATIVE_HALF: define noundef <4 x half> @
-// SPIR_NATIVE_HALF: define spir_func noundef <4 x half> @
-// DXIL_NATIVE_HALF: %hlsl.rsqrt = call <4 x half> @llvm.dx.rsqrt.v4f16
-// SPIR_NATIVE_HALF: %hlsl.rsqrt = call <4 x half> @llvm.spv.rsqrt.v4f16
+// NATIVE_HALF: define [[FNATTRS]] <4 x half> @
+// NATIVE_HALF: %hlsl.rsqrt = call <4 x half> @llvm.[[TARGET]].rsqrt.v4f16
 // NATIVE_HALF: ret <4 x half> %hlsl.rsqrt
-// DXIL_NO_HALF: define noundef <4 x float> @
-// SPIR_NO_HALF: define spir_func noundef <4 x float> @
-// DXIL_NO_HALF: %hlsl.rsqrt = call <4 x float> @llvm.dx.rsqrt.v4f32(
-// SPIR_NO_HALF: %hlsl.rsqrt = call <4 x float> @llvm.spv.rsqrt.v4f32(
+// NO_HALF: define [[FNATTRS]] <4 x float> @
+// NO_HALF: %hlsl.rsqrt = call <4 x float> @llvm.[[TARGET]].rsqrt.v4f32(
 // NO_HALF: ret <4 x float> %hlsl.rsqrt
 half4 test_rsqrt_half4(half4 p0) { return rsqrt(p0); }
 
-// DXIL_CHECK: define noundef float @
-// SPIR_CHECK: define spir_func noundef float @
-// DXIL_CHECK: %hlsl.rsqrt = call float @llvm.dx.rsqrt.f32(
-// SPIR_CHECK: %hlsl.rsqrt = call float @llvm.spv.rsqrt.f32(
+// CHECK: define [[FNATTRS]] float @
+// CHECK: %hlsl.rsqrt = call float @llvm.[[TARGET]].rsqrt.f32(
 // CHECK: ret float %hlsl.rsqrt
 float test_rsqrt_float(float p0) { return rsqrt(p0); }
-// DXIL_CHECK: define noundef <2 x float> @
-// SPIR_CHECK: define spir_func noundef <2 x float> @
-// DXIL_CHECK: %hlsl.rsqrt = call <2 x float> @llvm.dx.rsqrt.v2f32
-// SPIR_CHECK: %hlsl.rsqrt = call <2 x float> @llvm.spv.rsqrt.v2f32
+// CHECK: define [[FNATTRS]] <2 x float> @
+// CHECK: %hlsl.rsqrt = call <2 x float> @llvm.[[TARGET]].rsqrt.v2f32
 // CHECK: ret <2 x float> %hlsl.rsqrt
 float2 test_rsqrt_float2(float2 p0) { return rsqrt(p0); }
-// DXIL_CHECK: define noundef <3 x float> @
-// SPIR_CHECK: define spir_func noundef <3 x float> @
-// DXIL_CHECK: %hlsl.rsqrt = call <3 x float> @llvm.dx.rsqrt.v3f32
-// SPIR_CHECK: %hlsl.rsqrt = call <3 x float> @llvm.spv.rsqrt.v3f32
+// CHECK: define [[FNATTRS]] <3 x float> @
+// CHECK: %hlsl.rsqrt = call <3 x float> @llvm.[[TARGET]].rsqrt.v3f32
 // CHECK: ret <3 x float> %hlsl.rsqrt
 float3 test_rsqrt_float3(float3 p0) { return rsqrt(p0); }
-// DXIL_CHECK: define noundef <4 x float> @
-// SPIR_CHECK: define spir_func noundef <4 x float> @
-// DXIL_CHECK: %hlsl.rsqrt = call <4 x float> @llvm.dx.rsqrt.v4f32
-// SPIR_CHECK: %hlsl.rsqrt = call <4 x float> @llvm.spv.rsqrt.v4f32
+// CHECK: define [[FNATTRS]] <4 x float> @
+// CHECK: %hlsl.rsqrt = call <4 x float> @llvm.[[TARGET]].rsqrt.v4f32
 // CHECK: ret <4 x float> %hlsl.rsqrt
 float4 test_rsqrt_float4(float4 p0) { return rsqrt(p0); }
diff --git a/clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl 
b/clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
index 2004a9d894a579..59c1620334d0e3 100644
--- a/clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
+++ b/clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
@@ -1,22 +1,20 @@
-// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s 
--check-prefixes=CHECK,CHECK-DXIL
-// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s 
--check-prefixes=CHECK,CHECK-SPIRV
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s 
--check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx
+// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm 
-finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s 
--check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv
 
 // Make sure SV_DispatchThreadID translated into dx.thread.id.
 
 // CHECK:       define void @foo()
-// CHECK-DXIL:  %[[#ID:]] = call i32 @llvm.dx.thread.id(i32 0)
-// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.spv.thread.id(i32 0)
+// CHECK-DXIL:  %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0)
+// CHECK-SPIRV: %[[#ID:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0)
 // CHECK:       call void @{{.*}}foo{{.*}}(i32 %[[#ID]])
 [shader("compute")]
 [numthreads(8,8,1)]
 void foo(uint Idx : SV_DispatchThreadID) {}
 
 // CHECK:       define void @bar()
-// CHECK-DXIL:  %[[#ID_X:]] = call i32 @llvm.dx.thread.id(i32 0)
-// CHECK-SPIRV: %[[#ID_X:]] = call i32 @llvm.spv.thread.id(i32 0)
+// CHECK:       %[[#ID_X:]] = call i32 @llvm.[[TARGET]].thread.id(i32 0)
 // CHECK:       %[[#ID_X_:]] = insertelement <2 x i32> poison, i32 %[[#ID_X]], 
i64 0
-// CHECK-DXIL:  %[[#ID_Y:]] = call i32 @llvm.dx.thread.id(i32 1)
-// CHECK-SPIRV: %[[#ID_Y:]] = call i32 @llvm.spv.thread.id(i32 1)
+// CHECK:       %[[#ID_Y:]] = call i32 @llvm.[[TARGET]].thread.id(i32 1)
 // CHECK:       %[[#ID_XY:]] = insertelement <2 x i32> %[[#ID_X_]], i32 
%[[#ID_Y]], i64 1
 // CHECK-DXIL:  call void @{{.*}}bar{{.*}}(<2 x i32> %[[#ID_XY]])
 [shader("compute")]

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