================ @@ -1013,3 +1013,41 @@ // CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1 // RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s // CHECK-MVE3: #define __ARM_FEATURE_MVE 3 + +// Cortex-R52 and Cortex-R52Plus correctly enable the `fpv5-sp-d16` FPU when compiling for the SP only version of the CPU. +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52+nosimd+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52 %s +// CHECK-R52: #define __ARM_FEATURE_FMA 1 +// CHECK-R52: #define __ARM_FP 0x6 +// CHECK-R52: #define __ARM_FPV5__ 1 +// CHECK-R52: #define __ARM_VFPV2__ 1 +// CHECK-R52-NEXT: #define __ARM_VFPV3__ 1 +// CHECK-R52-NEXT: #define __ARM_VFPV4__ 1 +// CHECK-R52-NOT: #define __ARM_NEON 1 +// CHECK-R52-NOT: #define __ARM_NEON__ +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52plus+nosimd+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52PLUS %s +// CHECK-R52PLUS: #define __ARM_FEATURE_FMA 1 +// CHECK-R52PLUS: #define __ARM_FP 0x6 +// CHECK-R52PLUS: #define __ARM_FPV5__ 1 +// CHECK-R52PLUS: #define __ARM_VFPV2__ 1 +// CHECK-R52PLUS-NEXT: #define __ARM_VFPV3__ 1 +// CHECK-R52PLUS-NEXT: #define __ARM_VFPV4__ 1 +// CHECK-R52PLUS-NOT: #define __ARM_NEON 1 +// CHECK-R52PLUS-NOT: #define __ARM_NEON__ +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52-ONLY-NO-FP-DP %s +// CHECK-R52-ONLY-NO-FP-DP: #define __ARM_FEATURE_FMA 1 ---------------- Stylie777 wrote:
I have updated the tests to use the same check lines. Will merge after a Green CI run. Thanks for the review. https://github.com/llvm/llvm-project/pull/124935 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
