================
@@ -1065,6 +1065,20 @@ def FeatureStdExtSsaia
def FeatureStdExtSmcntrpmf
: RISCVExtension<1, 0, "Cycle and Instret Privilege Mode Filtering">;
+def FeatureStdExtSmcsps
+ : RISCVExperimentalExtension<0, 19,
+ "Conditional Stack Pointer Swap at Machine
Level">;
+def HasStdExtSmcsps : Predicate<"Subtarget->hasStdExtSmcsps()">,
+ AssemblerPredicate<(all_of FeatureStdExtSmcsps),
+ "'Smcsps' (Conditional Stack Pointer Swap at Machine
Level)">;
+def FeatureStdExtSscsps
+ : RISCVExperimentalExtension<0, 19,
+ "Conditional Stack Pointer Swap at Supervisor
Level",
+ [FeatureStdExtSmcsps]>;
----------------
zeyi2 wrote:
The dependency is specified here:
https://github.com/riscv/riscv-fast-interrupt/blob/603f1693a6f7d4ad9d878b58ec5a514708f00fe3/src/aclic.adoc?plain=1#L1266-L1270
https://github.com/llvm/llvm-project/pull/211712
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